| OTPC HAL | Hardware access layer for managing the One Time Programmable Controller (OTPC) peripheral |
| PMICC HAL | Hardware access layer for managing Power Management Integrated Circuit Controller (PMICC) |
| ►Drivers | List of all drivers available in nrfx |
| ►AAR | |
| AAR HAL | Hardware access layer for managing the Accelerated Address Resolver (AAR) peripheral |
| ►ACL | |
| ACL HAL | Hardware access layer for managing the Access Control List (ACL) peripheral |
| ►ADC | |
| ►ADC driver | Analog-to-Digital Converter (ADC) peripheral driver |
| ADC peripheral driver configuration | |
| ADC HAL | Hardware access layer for managing the Analog-to-Digital Converter (ADC) peripheral |
| ►BELLBOARD | |
| ►BELLBOARD driver | BELLBOARD peripheral driver |
| Generic inter-domain signalling layer. | Helper layer that provides the common functionality for the inter-domain signalling (IDS) mechanisms |
| BELLBOARD HAL | Hardware access layer for managing the BELLBOARD peripheral |
| BELLBOARD HALY | Hardware access layer with cache and barrier support for managing the BELLBOARD peripheral |
| ►BPROT | |
| BPROT HAL | Hardware access layer for managing the Block Protection (BPROT) mechanism |
| ►CACHE | |
| CACHE HAL | The hardware access layer for managing the CACHE peripheral |
| ►CCM | |
| AES CCM HAL | Hardware access layer for managing the AES CCM peripheral |
| ►CLOCK | |
| ►CLOCK driver | CLOCK peripheral driver |
| CLOCK peripheral driver configuration | |
| Auxiliary PLL HAL | Hardware access layer for managing the Auxiliary Phase Locked Loop (AUXPLL) peripheral |
| Clock HAL | Hardware access layer for managing the CLOCK peripheral |
| FLL16M HAL | Hardware access layer for managing the 16 MHz Frequency Locked Loop (FLL16M) peripheral |
| HFXO HAL | Hardware access layer for managing the High Frequency Crystal Oscillator (HFXO) |
| HFXO64M HAL | Hardware access layer for managing the High Frequency Crystal Oscillator 64MHz (HFXO64M) |
| HSFLL HAL | Hardware access layer for managing the High Speed Frequency Locked Loop (HSFLL) |
| Low Frequency Clock Multiplexer HAL | Hardware access layer for managing the Low Frequency Clock Multiplexer |
| LFRC HAL | Hardware access layer for managing the Low Frequency 32 KHz RC Oscillator (LFRC) |
| LFXO HAL | Hardware access layer for managing the Low Frequency Crystal Oscillator (LFXO) |
| OSCILLATORS HAL | Hardware access layer for managing the OSCILLATORS peripheral |
| ►COMP | |
| ►COMP driver | Comparator (COMP) peripheral driver |
| COMP peripheral driver configuration | |
| COMP HAL | Hardware access layer (HAL) for managing the Comparator (COMP) peripheral |
| COMP HALY | Hardware access layer with cache and barrier support for managing the COMP peripheral |
| ►Cortex-M Systick | |
| ►ARM(R) SysTick driver | ARM(R) SysTick driver |
| ARM(R) SysTick driver configuration | |
| SYSTICK HAL | Hardware access layer (HAL) for managing the SYSTICK peripheral |
| ►CRACEN | |
| CRACEN HAL | Hardware access layer for managing the Crypto Accelerator Engine (CRACEN) peripheral |
| ►CTRL-AP | |
| CTRL-AP HAL | Hardware access layer for managing the Control Access Port (CTRL-AP) peripheral |
| ►DCNF | |
| DCNF HAL | Hardware access layer for managing the Domain Configuration (DCNF) module |
| ►DPPI | |
| Generic PPI layer | Helper layer that provides the common functionality of PPI and DPPI drivers |
| DPPI allocator | Distributed Programmable Peripheral Interconnect (DPPI) allocator |
| DPPI Controller HAL | Hardware access layer for managing the Distributed Programmable Peripheral Interconnect Controller (DPPIC) |
| DPPI HALY | Hardware access layer with cache and barrier support for managing the DPPI peripheral |
| ►ECB | |
| AES ECB encryption HAL | Hardware access layer (HAL) for managing the Advanced Encryption Standard (AES) Electronic Codebook (ECB) peripheral |
| ►EGU | |
| EGU driver | Event Generator Unit (EGU) peripheral driver |
| EGU HAL | Hardware access layer for managing the Event Generator Unit (EGU) peripheral |
| ►EXMIF | |
| EXMIF HAL | Hardware access layer for managing the External Memory Interface (EXMIF) peripheral |
| ►FPU | |
| FPU HAL | Hardware access layer (HAL) for managing the Floating Point Unit configuration |
| ►GLITCHDET | |
| GLITCHDET HAL | Hardware access layer for managing the Voltage Glitch Detectors (GLITCHDET) peripheral |
| ►GPIO | |
| GPIO HAL | Hardware access layer for managing the GPIO peripheral |
| GPIO HALY | Hardware access layer with cache and barrier support for managing the GPIO peripheral |
| ►GPIOTE | |
| ►GPIOTE driver | GPIO Task Event (GPIOTE) peripheral driver |
| GPIOTE peripheral driver configuration | |
| GPIOTE HAL | Hardware access layer (HAL) for managing the GPIOTE peripheral |
| GPIOTE HALY | Hardware access layer with cache and barrier support for managing the GPIOTE peripheral |
| ►GRTC | |
| GRTC driver | Global Real Timer Counter (GRTC) peripheral driver |
| GRTC HAL | Hardware access layer for managing the Global Real Time Counter (GRTC) peripheral |
| GRTC HALY | Hardware access layer with cache and barrier support for managing the GRTC peripheral |
| ►I2S | |
| ►I2S driver | Inter-IC Sound (I2S) peripheral driver |
| I2S peripheral driver configuration | |
| I2S HAL | Hardware access layer for managing the Inter-IC Sound (I2S) peripheral |
| I2S HALY | Hardware access layer with cache and barrier support for managing the I2S peripheral |
| ►ICR | |
| FICR HAL | Hardware access layer (HAL) for getting data from the Factory Information Configuration Registers (FICR) |
| UICR HAL | Hardware access layer for managing the User Information Configuration Registers (UICR) peripheral |
| ►IPC | |
| ►IPC driver | Interprocessor Communication (IPC) peripheral driver |
| Generic inter-domain signalling layer. | Helper layer that provides the common functionality for the inter-domain signalling (IDS) mechanisms |
| IPC HAL | Hardware access layer for managing the Interprocessor Communication (IPC) peripheral |
| ►IPCT | |
| IPCT HAL | Hardware access layer for managing the Inter-Processor Communication Transceiver (IPCT) peripheral |
| ►KMU | |
| KMU HAL | Hardware access layer for managing the Key Management Unit (KMU) peripheral |
| ►LPCOMP | |
| ►LPCOMP driver | Low Power Comparator (LPCOMP) peripheral driver |
| LPCOMP peripheral driver configuration | |
| LPCOMP HAL | Hardware access layer for managing the Low Power Comparator (LPCOMP) peripheral |
| LPCOMP HALY | Hardware access layer with cache and barrier support for managing the LPCOMP peripheral |
| ►LRC | |
| LRCCONF HAL | Hardware access layer for managing the Local Resource Controller Configuration (LRCCONF) peripheral |
| ►MEMCONF | |
| MEMCONF HAL | Hardware access layer for managing the Memory Configuration (MEMCONF) peripheral |
| ►MPC | |
| MPC HAL | Hardware access layer for managing the Memory Privilege Controller (MPC) peripheral |
| ►MPU | |
| MPU HAL | Hardware access layer for managing the Memory Protection Unit (MPU) peripheral |
| ►MUTEX | |
| MUTEX HAL | Hardware access layer for managing the MUTEX peripheral |
| ►MVDMA | |
| Generic Vector DMA layer. | Helper layer that provides the common functionality for Vector DMA (VDMA) |
| MVDMA driver | Memory-to-Memory Vector DMA (MVDMA) peripheral driver |
| MVDMA HAL | Hardware access layer for managing the Memory-to-Memory Vector DMA (MVDMA) peripheral |
| MVDMA HALY | Hardware access layer with cache and barrier support for managing the MVDMA peripheral |
| ►MWU | |
| MWU HAL | Hardware access layer for managing the Memory Watch Unit (MWU) peripheral |
| ►NFCT | |
| ►NFCT driver | Near Field Communication Tag (NFCT) peripheral driver |
| NFCT peripheral driver configuration | |
| NFCT driver fixes and workarounds | Fixes for hardware-related anomalies |
| NFCT HAL | Hardware access layer (HAL) for the Near Field Communication Tag (NFCT) peripheral |
| NFCT HALY | Hardware access layer with cache and barrier support for managing the NFCT peripheral |
| ►NVMC | |
| NVMC driver | Non-Volatile Memory Controller (NVMC) peripheral driver |
| NVMC HAL | Hardware access layer (HAL) for managing the Non-Volatile Memory Controller (NVMC) peripheral |
| ►PDM | |
| ►PDM driver | Pulse Density Modulation (PDM) peripheral driver |
| PDM peripheral driver configuration | |
| PDM HAL | Hardware access layer for managing the Pulse Density Modulation (PDM) peripheral |
| PDM HALY | Hardware access layer with cache and barrier support for managing the PDM peripheral |
| ►POWER | |
| Generic Reset Reason layer | Helper layer that provides a uniform way of checking the reset reason |
| ►POWER driver | POWER peripheral driver |
| POWER peripheral driver configuration | |
| USBREG driver | USB regulators (USBREG) peripheral driver |
| MBIAS HAL | Hardware access layer for managing the Master Bias Generator (MBIAS) |
| OSCRFR HAL | Hardware access layer for managing the Oscillator for Refresh (OSCRFR) |
| POWER HAL | Hardware access layer for managing the POWER peripheral |
| REGULATORS HAL | Hardware access layer for managing the REGULATORS peripheral |
| RESET HAL | Hardware access layer for managing the RESET peripheral |
| SWEXT HAL | Hardware access layer for managing the Switch for 1.8V to External (SWEXT) |
| USBREG HAL | Hardware access layer for managing the USB regulator peripheral |
| VDET1V0 HAL | Hardware access layer for managing the 1.0V Voltage Detector (VDET1V0) |
| Always-on 0.8V Voltage Detector HAL | Hardware access layer for managing the Always-on 0.8V Voltage Detector (VDETAO0V8) |
| Always-on 1.8V Voltage Detector HAL | Hardware access layer for managing the Always-on 1.8V Voltage Detector (VDETAO1V8) |
| Always-on 5.0V Voltage Detector HAL | Hardware access layer for managing the Always-on 5.0V Voltage Detector (VDETAO5V0) |
| IO VDETIO HAL | Hardware access layer for managing the Input/Output Voltage Detector (VDETIO) |
| VDETPOF5V0 HAL | Hardware access layer for managing the 5 V power-fail comparator (VDETPOF5V0) |
| Voltage scaling 0.8V Voltage Detector HAL | Hardware access layer for managing the Voltage scaling 0.8V Voltage Detector (VDETVS0V8) |
| 1.0V Voltage Regulator HAL | Hardware access layer for managing the 1.0V Voltage Regulator |
| Always-on 0.8V Voltage Regulator HAL | Hardware access layer for managing the Always-on 0.8V Voltage Regulator (VREGAO0V8) |
| Always-on 1.8V Voltage Regulator HAL | Hardware access layer for managing the Always-on 1.8V Voltage Regulator (VREGAO1V8) |
| Main Voltage Regulator HAL | Hardware access layer for managing the Main Voltage Regulator (VREGMAIN) |
| MRAM Voltage Regulator HAL | Hardware access layer for managing the MRAM Voltage Regulator |
| Startup Voltage Regulator HAL | Hardware access layer for managing the Startup Voltage Regulator (VREGSU) |
| USB Voltage Regulator HAL | Hardware access layer for managing the USB Voltage Regulator |
| Voltage scaling 0.8V Voltage Regulator HAL | Hardware access layer for managing the voltage scaling 0.8V Voltage Regulator (VREGVS0V8) |
| VREQCTRL HAL | Hardware access layer for managing the VREQCTRL peripheral |
| ►PPI | |
| Generic PPI layer | Helper layer that provides the common functionality of PPI and DPPI drivers |
| ►PPI allocator | Programmable Peripheral Interconnect (PPI) allocator |
| PPI peripheral allocator configuration | |
| PPI HAL | Hardware access layer (HAL) for managing the Programmable Peripheral Interconnect (PPI) channels |
| ►PPIB | |
| PPIB HAL | Hardware access layer for managing the PPI Bridge (PPIB) peripheral |
| ►PWM | |
| ►PWM driver | Pulse Width Modulation (PWM) peripheral driver |
| PWM peripheral driver configuration | |
| PWM HAL | Hardware access layer for managing the Pulse Width Modulation (PWM) peripheral |
| PWM HALY | Hardware access layer with cache and barrier support for managing the PWM peripheral |
| ►RAMC | |
| RAMC RAM Controller HAL | Hardware access layer for managing the Random Access Memory Controller (RAMC) peripheral |
| ►RESETINFO | |
| RESETINFO HAL | Hardware access layer for managing the Reset information peripheral (RESETINFO) |
| ►RRAMC | |
| RRAMC driver | Resistive Random Access Memory Controller (RRAMC) peripheral driver |
| RRAMC HAL | Hardware access layer for managing the the Resistive Random Access Memory Controller (RRAMC) peripheral |
| RRAMC HALY | Hardware access layer with cache and barrier support for managing the RRAMC peripheral |
| ►QDEC | |
| ►QDEC driver | Quadrature Decoder (QDEC) peripheral driver |
| QDEC peripheral driver configuration | |
| QDEC HAL | Hardware access layer for managing the Quadrature Decoder (QDEC) peripheral |
| QDEC HALY | Hardware access layer with cache and barrier support for managing the QDEC peripheral |
| ►QSPI | |
| ►QSPI driver | Quad Serial Peripheral Interface (QSPI) peripheral driver |
| QSPI peripheral driver configuration | |
| QSPI HAL | Hardware access layer for managing the QSPI peripheral |
| ►RADIO | |
| RADIO HAL | Hardware access layer for managing the RADIO peripheral |
| ►RNG | |
| ►RNG driver | Random Number Generator (RNG) peripheral driver |
| RNG peripheral driver configuration | |
| RNG HAL | Hardware access layer (HAL) for managing the Random Number Generator (RNG) peripheral |
| ►RTC | |
| ►RTC driver | Real Timer Counter (RTC) peripheral driver |
| RTC peripheral driver configuration | |
| RTC HAL | Hardware access layer for managing the Real Time Counter (RTC) peripheral |
| RTC HALY | Hardware access layer with cache and barrier support for managing the RTC peripheral |
| ►SAADC | |
| ►SAADC driver | Successive Approximation Analog-to-Digital Converter (SAADC) peripheral driver |
| SAADC peripheral driver configuration | |
| SAADC HAL | Hardware access layer for managing the SAADC peripheral |
| SAADC HALY | Hardware access layer with cache and barrier support for managing the SAADC peripheral |
| ►SPI | |
| ►SPI driver | Serial Peripheral Interface master (SPI) driver |
| SPI peripheral driver configuration | |
| SPI HAL | Hardware access layer for managing the SPI peripheral |
| ►SPIM | |
| ►SPIM driver | Serial Peripheral Interface Master with EasyDMA (SPIM) driver |
| SPIM peripheral driver configuration | |
| SPIM HAL | Hardware access layer for managing the SPIM peripheral |
| SPIM HALY | Hardware access layer with cache and barrier support for managing the SPIM peripheral |
| ►SPIS | |
| ►SPIS driver | Serial Peripheral Interface Slave with EasyDMA (SPIS) driver |
| SPIS peripheral driver configuration | |
| SPIS HAL | Hardware access layer for managing the SPIS peripheral |
| ►SPU | |
| SPU HAL | Hardware access layer for managing the System Protection Unit (SPU) peripheral |
| ►STM | |
| STM HAL | Hardware access layer for managing the System Trace Macrocell (STM) peripheral |
| STMESP HAL | Hardware access layer for managing the System Trace Macrocell Extended Stimulus Port (STMESP) peripheral |
| ►TAMPC | |
| TAMPC HAL | Hardware access layer for managing the Tamper Controller (TAMPC) peripheral |
| ►TBM | |
| TBM driver | Trace Buffer Monitor (TBM) driver |
| TBM HAL | Hardware access layer for managing the Trace Buffer Monitor (TBM) peripheral |
| TBM HALY | Hardware access layer with cache and barrier support for managing the Trace Buffer Monitor (TBM) |
| ►TEMP | |
| TEMP driver | Temperature sensor (TEMP) driver |
| TEMP HAL | Hardware access layer for managing the Temperature sensor (TEMP) |
| TEMP HALY | Hardware access layer with cache and barrier support for managing the Temperature sensor (TEMP) |
| ►TIMER | |
| ►Timer driver | TIMER peripheral driver |
| TIMER periperal driver configuration | |
| TIMER HAL | Hardware access layer for managing the TIMER peripheral |
| TIMER HALY | Hardware access layer with cache and barrier support for managing the TIMER peripheral |
| ►TWI | |
| ►TWI driver | Two Wire Interface master (TWI) peripheral driver |
| TWI peripheral driver configuration | |
| TWI HAL | Hardware access layer for managing the TWI peripheral |
| ►TWIM | |
| ►TWIM driver | Two Wire Interface Master with EasyDMA (TWIM) peripheral driver |
| TWIM peripheral driver configuration | |
| TWIM HAL | Hardware access layer for managing the TWIM peripheral |
| TWIM HALY | Hardware access layer with cache and barrier support for managing the TWIM peripheral |
| ►TWIS | |
| ►TWIS driver | Two Wire Interface Slave with EasyDMA (TWIS) peripheral driver |
| TWIS peripheral driver configuration | |
| TWIS HAL | Hardware access layer for managing the Two Wire Interface Slave with EasyDMA (TWIS) peripheral |
| ►UART | |
| ►UART driver | UART peripheral driver |
| UART peripheral driver configuration | |
| UART HAL | Hardware access layer for managing the UART peripheral |
| ►UARTE | |
| ►UARTE driver | UARTE peripheral driver |
| UARTE peripheral driver configuration | |
| Flags used for @ref nrfx_uarte_rx_enable. | |
| Flags used for @ref nrfx_uarte_tx. | |
| Flags used for @ref nrfx_uarte_tx_evt_t. | |
| UARTE HAL | Hardware access layer for managing the UARTE peripheral |
| UARTE HALY | Hardware access layer with cache and barrier support for managing the UARTE peripheral |
| ►USBD | |
| ►USBD driver | Universal Serial Bus Device (USBD) peripheral driver |
| USBD peripheral driver configuration | |
| USBREG driver | USB regulators (USBREG) peripheral driver |
| USBD HAL | Hardware access layer for managing the Universal Serial Bus Device (USBD) peripheral |
| USBREG HAL | Hardware access layer for managing the USB regulator peripheral |
| ►USBHS | |
| USBHS HAL | Hardware access layer for managing the Universal Serial Bus High Speed (USBHS) peripheral |
| ►VMC | |
| VMC HAL | Hardware access layer for managing the Volatile Memory Controller (VMC) peripheral |
| ►VPR | |
| ►VEVIF driver | VPR Event Interface (VEVIF) mechanism driver |
| Generic inter-domain signalling layer. | Helper layer that provides the common functionality for the inter-domain signalling (IDS) mechanisms |
| VPR HAL | Hardware access layer for managing the VPR RISC-V CPU unit (VPR) |
| VPR CLIC HAL | Hardware access layer for managing the VPR RISC-V CPU Interrupt Controller (VPR CLIC) |
| VPR CSR HAL | Hardware access layer for managing the VPR RISC-V CPU Control and Status Registers (VPR CSR) |
| VPR CSR VEVIF HAL | Hardware access layer for managing the VPR RISC-V CPU Control and Status Registers for VPR Event Interface (VPR CSR VEVIF) |
| VPR CSR VIO HAL | Hardware access layer for managing the VPR RISC-V CPU Control and Status Registers for VPR IO (VPR CSR VIO) |
| VPR CSR VTIM HAL | Hardware access layer for managing the VPR RISC-V CPU Control and Status Registers for VPR Timer (VPR CSR VTIM) |
| VPR HALY | Hardware access layer with cache and barrier support for managing the VPR peripheral |
| ►WDT | |
| ►WDT driver | Watchdog Timer (WDT) peripheral driver |
| WDT peripheral driver configuration | |
| WDT HAL | Hardware access layer for managing the Watchdog Timer (WDT) peripheral |
| WDT HALY | Hardware access layer with cache and barrier support for managing the WDT peripheral |
| ►CPUCONF | |
| CPUCONF HAL | Hardware access layer (HAL) for managing the CPU configuration (CPUCONF) peripheral |
| ►DISPC | |
| DISPC HAL | Hardware access layer for managing the Display Controller (DISPC) peripheral |
| ►GPU | |
| GPU HAL | Hardware access layer for managing the Graphics Processing Unit (GPU) |
| ►GRCCONF | |
| GRCCONF HAL | Hardware access layer for managing Global Resource Controller (GRCCONF) |
| ►IRQMAP | |
| IRQMAP HAL | Hardware access layer for managing the Interrupt Mapper peripheral (IRQMAP) |
| ►IPCMAP | |
| IPCMAP HAL | Hardware access layer for managing the Inter-Processor Map (IPCMAP) peripheral |
| ►MRAMC | |
| MRAMC HAL | Hardware access layer for managing the Magnetoresistive Random Access Memory Controller (MRAMC) peripheral |
| ►PCRM | |
| PCRM HAL | Hardware access layer for managing Power and Clock Resource Manager (PCRM) |
| ►RESET | |
| RESETHUB HAL | Hardware access layer (HAL) for managing the reset hub (RESETHUB) peripheral |
| ►nrfx API | |
| Common configuration | |
| Generic flag allocator | Generic flag allocator |
| Generic PPI layer | Helper layer that provides the common functionality of PPI and DPPI drivers |
| Power Management | Power Management interface |
| Power Management | Helper layer that provides support for nrfx_pm interface. This file contains functionality that should be used only from inside drivers |
| Generic RAM Control layer | Helper layer that provides a uniform way of controlling the RAM power and retention settings |
| Generic Reset Reason layer | Helper layer that provides a uniform way of checking the reset reason |
| Register Retention API | Helper that allows preserving important data from peripheral's registers |
| Utility macros for saving and restoring PCGCM & PCGCS peripherals | Utility macros for saving and restoring PCGCM & PCGCS peripherals |
| Utility macros and functions for saving and restoring SPU peripheral | Utility macros and functions for saving and restoring SPU peripheral |
| Utility macros and functions for saving and restoring peripherals | Utility macros and functions for saving and restoring peripherals |
| Bitmask module | Bitmask managing module |
| Common module | Common module |
| Global Error Codes | Global error code definitions |
| Preprocessor utility macros | Preprocessor utility macros |
| ►Peripheral Resource Sharing (PRS) | Peripheral Resource Sharing interface (PRS) |
| Peripheral Resource Sharing module configuration | |
| Common nrfy module | Common nrfy module |
| APB bus support | Support for APB bus services |
| DPPIC and PPIB interconnect support | Support for DPPIC and PPIB interconnect services |
| IPCT support | Support for IPCT interconnection services |
| Atomic operations API | This module implements C11 stdatomic.h simplified API |
| Core-dependent functionality | Module containing functions with core-dependent implementation, like delay |
| nrfx_glue.h | This file contains macros that should be implemented according to the needs of the host environment into which nrfx is integrated |
| nrfx_log.h | This file contains macros that should be implemented according to the needs of the host environment into which nrfx is integrated |