Hardware access layer for managing the User Information Configuration Registers (UICR) peripheral.
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#define | NRF_UICR_HAS_FEATURE_GPIO 1 |
| Symbol indicating whether GPIO port owner feature is present.
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#define | NRF_UICR_HAS_CH_LINK_DIR_EN 1 |
| Symbol indicating whether linking channels of DPPI as either source or sink is configured using the LINK.DIR and LINK.EN registers.
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#define | NRF_UICR_MEM_COUNT UICR_MEM_MaxCount |
| Number of memory blocks.
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#define | NRF_UICR_PERIPH_COUNT UICR_PERIPH_MaxCount |
| Number of peripherals.
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#define | NRF_UICR_GPIO_COUNT UICR_GPIO_MaxCount |
| Number of GPIOs.
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#define | NRF_UICR_GPIOTE_CH_COUNT UICR_GPIOTE_MaxCount |
| Number of GPIOTE channels.
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#define | NRF_UICR_IPCT_GLOBAL_COUNT UICR_IPCT_GLOBAL_MaxCount |
| Number of global IPCTs.
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#define | NRF_UICR_DPPI_LOCAL_COUNT UICR_DPPI_LOCAL_MaxCount |
| Number of local IPCTs.
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#define | NRF_UICR_DPPI_GLOBAL_COUNT UICR_DPPI_GLOBAL_MaxCount |
| Number of global DPPIs.
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#define | NRF_UICR_IPCMAP_COUNT UICR_IPCMAP_MaxCount |
| Number of IPCMAPs.
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#define | NRF_UICR_MAILBOX_COUNT UICR_MAILBOX_MaxCount |
| Number of MAILBOXes.
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enum | nrf_uicr_mem_config_perm_mask_t {
NRF_UICR_MEM_CONFIG_PERM_READ_MASK = UICR_MEM_CONFIG_READ_Msk
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NRF_UICR_MEM_CONFIG_PERM_WRITE_MASK = UICR_MEM_CONFIG_WRITE_Msk
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NRF_UICR_MEM_CONFIG_PERM_EXECUTE_MASK = UICR_MEM_CONFIG_EXECUTE_Msk
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NRF_UICR_MEM_CONFIG_PERM_NONSECURE_MASK = UICR_MEM_CONFIG_SECURE_Msk
} |
| Permissions mask. More...
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enum | nrf_uicr_feature_index_mask_t {
NRF_UICR_FEATURE_INDEX_0_MASK = UICR_GPIOTE_CH_OWN_CH0_Msk
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NRF_UICR_FEATURE_INDEX_1_MASK = UICR_GPIOTE_CH_OWN_CH1_Msk
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NRF_UICR_FEATURE_INDEX_2_MASK = UICR_GPIOTE_CH_OWN_CH2_Msk
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NRF_UICR_FEATURE_INDEX_3_MASK = UICR_GPIOTE_CH_OWN_CH3_Msk
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NRF_UICR_FEATURE_INDEX_4_MASK = UICR_GPIOTE_CH_OWN_CH4_Msk
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NRF_UICR_FEATURE_INDEX_5_MASK = UICR_GPIOTE_CH_OWN_CH5_Msk
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NRF_UICR_FEATURE_INDEX_6_MASK = UICR_GPIOTE_CH_OWN_CH6_Msk
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NRF_UICR_FEATURE_INDEX_7_MASK = UICR_GPIOTE_CH_OWN_CH7_Msk
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NRF_UICR_FEATURE_INDEX_8_MASK = UICR_GPIOTE_CH_OWN_CH8_Msk
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NRF_UICR_FEATURE_INDEX_9_MASK = UICR_GPIOTE_CH_OWN_CH9_Msk
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NRF_UICR_FEATURE_INDEX_10_MASK = UICR_GPIOTE_CH_OWN_CH10_Msk
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NRF_UICR_FEATURE_INDEX_11_MASK = UICR_GPIOTE_CH_OWN_CH11_Msk
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NRF_UICR_FEATURE_INDEX_12_MASK = UICR_GPIOTE_CH_OWN_CH12_Msk
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NRF_UICR_FEATURE_INDEX_13_MASK = UICR_GPIOTE_CH_OWN_CH13_Msk
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NRF_UICR_FEATURE_INDEX_14_MASK = UICR_GPIOTE_CH_OWN_CH14_Msk
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NRF_UICR_FEATURE_INDEX_15_MASK = UICR_GPIOTE_CH_OWN_CH15_Msk
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NRF_UICR_FEATURE_INDEX_16_MASK = UICR_GPIOTE_CH_OWN_CH16_Msk
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NRF_UICR_FEATURE_INDEX_17_MASK = UICR_GPIOTE_CH_OWN_CH17_Msk
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NRF_UICR_FEATURE_INDEX_18_MASK = UICR_GPIOTE_CH_OWN_CH18_Msk
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NRF_UICR_FEATURE_INDEX_19_MASK = UICR_GPIOTE_CH_OWN_CH19_Msk
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NRF_UICR_FEATURE_INDEX_20_MASK = UICR_GPIOTE_CH_OWN_CH20_Msk
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NRF_UICR_FEATURE_INDEX_21_MASK = UICR_GPIOTE_CH_OWN_CH21_Msk
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NRF_UICR_FEATURE_INDEX_22_MASK = UICR_GPIOTE_CH_OWN_CH22_Msk
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NRF_UICR_FEATURE_INDEX_23_MASK = UICR_GPIOTE_CH_OWN_CH23_Msk
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NRF_UICR_FEATURE_INDEX_24_MASK = UICR_GPIOTE_CH_OWN_CH24_Msk
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NRF_UICR_FEATURE_INDEX_25_MASK = UICR_GPIOTE_CH_OWN_CH25_Msk
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NRF_UICR_FEATURE_INDEX_26_MASK = UICR_GPIOTE_CH_OWN_CH26_Msk
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NRF_UICR_FEATURE_INDEX_27_MASK = UICR_GPIOTE_CH_OWN_CH27_Msk
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NRF_UICR_FEATURE_INDEX_28_MASK = UICR_GPIOTE_CH_OWN_CH28_Msk
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NRF_UICR_FEATURE_INDEX_29_MASK = UICR_GPIOTE_CH_OWN_CH29_Msk
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NRF_UICR_FEATURE_INDEX_30_MASK = UICR_GPIOTE_CH_OWN_CH30_Msk
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NRF_UICR_FEATURE_INDEX_31_MASK = UICR_GPIOTE_CH_OWN_CH31_Msk
} |
| Feature index mask. More...
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enum | nrf_uicr_feature_t {
NRF_UICR_FEATURE_GPIO
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NRF_UICR_FEATURE_GPIOTE_CH
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NRF_UICR_FEATURE_IPCT_LOCAL_CH
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NRF_UICR_FEATURE_IPCT_LOCAL_INTERRUPT
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NRF_UICR_FEATURE_IPCT_GLOBAL_CH
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NRF_UICR_FEATURE_IPCT_GLOBAL_INTERRUPT
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NRF_UICR_FEATURE_DPPI_LOCAL_CH
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NRF_UICR_FEATURE_DPPI_LOCAL_CHG
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NRF_UICR_FEATURE_DPPI_GLOBAL_CH
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NRF_UICR_FEATURE_DPPI_GLOBAL_CHG
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NRF_UICR_FEATURE_GRTC_CC
} |
| UICR features. More...
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NRF_STATIC_INLINE nrf_uicr_mem_config_t | nrf_uicr_mem_config_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the configuration of the memory block.
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NRF_STATIC_INLINE uint32_t | nrf_uicr_mem_size_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the size of the memory block.
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NRF_STATIC_INLINE nrf_uicr_periph_config_t | nrf_uicr_periph_config_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the configuration of the peripheral.
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NRF_STATIC_INLINE uint32_t | nrf_uicr_feature_own_get (NRF_UICR_Type const *p_reg, nrf_uicr_feature_t feature, uint8_t index) |
| Function for getting the ownership requests of the feature.
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NRF_STATIC_INLINE uint32_t | nrf_uicr_feature_secure_get (NRF_UICR_Type const *p_reg, nrf_uicr_feature_t feature, uint8_t index) |
| Function for getting the permission requests of the feature.
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NRF_STATIC_INLINE nrf_uicr_dppi_link_t | nrf_uicr_feature_link_get (NRF_UICR_Type const *p_reg, nrf_uicr_feature_t feature, uint8_t index) |
| Function for getting the linking requests of the feature.
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NRF_STATIC_INLINE nrf_uicr_ipcmap_config_t | nrf_uicr_ipcmap_config_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the configuration of the IPCMAP channel.
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NRF_STATIC_INLINE uint32_t | nrf_uicr_mailbox_address_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the address of the MAILBOX.
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NRF_STATIC_INLINE nrf_uicr_mailbox_config_t | nrf_uicr_mailbox_config_get (NRF_UICR_Type const *p_reg, uint8_t index) |
| Function for getting the configuration of the MAILBOX.
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NRF_STATIC_INLINE uint32_t | nrf_uicr_initsvtor_get (NRF_UICR_Type const *p_reg) |
| Function for getting the initial value of the secure VTOR (Vector Table Offset Register).
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NRF_STATIC_INLINE uint32_t | nrf_uicr_initnsvtor_get (NRF_UICR_Type const *p_reg) |
| Function for getting the initial value of the non-secure VTOR.
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NRF_STATIC_INLINE uint32_t * | nrf_uicr_ptrextuicr_get (NRF_UICR_Type const *p_reg) |
| Function for getting the pointer to the extended UICR.
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Hardware access layer for managing the User Information Configuration Registers (UICR) peripheral.