Hardware access layer for managing the System Protection Unit (SPU) peripheral. More...

Macros
#define	NRF_SPU_HAS_OWNERSHIP 1
	Presence of ownership feature.

#define	NRF_SPU_HAS_MEMORY 1
	Presence of memory feature.

#define	NRF_SPU_HAS_BLOCK 1
	Symbol indicating whether block feature is present.

#define	NRF_SPU_HAS_BELLS 1
	Symbol indicating whether SPU has registers related to BELLS.

#define	NRF_SPU_HAS_DOMAIN 1
	Symbol indicating whether SPU uses DOMAIN register name.

#define	NRF_SPU_HAS_IPCT 1
	Symbol indicating whether SPU has registers related to IPCT.

#define	NRF_SPU_HAS_TDD 1
	Symbol indicating whether SPU has registers related to TDD.

#define	NRF_SPU_HAS_MRAMC 1
	Symbol indicating whether SPU has registers related to MRAMC.

#define	NRF_SPU_PERIPH_COUNT SPU_PERIPH_MaxCount
	Number of peripherals.

#define	NRF_SPU_FEATURE_IPCT_CHANNEL_COUNT SPU_FEATURE_IPCT_CH_MaxCount
	Number of IPCT channels.

#define	NRF_SPU_FEATURE_IPCT_INTERRUPT_COUNT SPU_FEATURE_IPCT_INTERRUPT_MaxCount
	Number of IPCT interrupts.

#define	NRF_SPU_FEATURE_DPPI_CHANNEL_COUNT SPU_FEATURE_DPPIC_CH_MaxCount
	Number of DPPI channels.

#define	NRF_SPU_FEATURE_DPPI_CHANNEL_GROUP_COUNT SPU_FEATURE_DPPIC_CHG_MaxCount
	Number of DPPI channel groups.

#define	NRF_SPU_FEATURE_GPIOTE_COUNT SPU_FEATURE_GPIOTE_MaxCount
	Number of GPIOTEs.

#define	NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT SPU_FEATURE_GPIOTE_CH_MaxCount
	Number of GPIOTE channels.

#define	NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT SPU_FEATURE_GPIOTE_INTERRUPT_MaxCount
	Number of GPIOTE interrupts.

#define	NRF_SPU_FEATURE_GPIO_COUNT SPU_FEATURE_GPIO_MaxCount
	Number of GPIOs.

#define	NRF_SPU_FEATURE_GPIO_PIN_COUNT SPU_FEATURE_GPIO_PIN_MaxCount
	Number of GPIO pins.

#define	NRF_SPU_FEATURE_GRTC_CC_COUNT SPU_FEATURE_GRTC_CC_MaxCount
	Number of GRTC compare channels.

#define	NRF_SPU_FEATURE_GRTC_INTERRUPT_COUNT SPU_FEATURE_GRTC_INTERRUPT_MaxCount
	Number of GRTC interrupts..

#define	NRF_SPU_FEATURE_BELL_DOMAIN_COUNT SPU_FEATURE_BELLS_DOMAIN_MaxCount
	Number of BELL domains.

#define	NRF_SPU_FEATURE_BELL_BELL_COUNT SPU_FEATURE_BELLS_DOMAIN_BELL_MaxCount
	Number of BELL Domain/Processor features.

#define	NRF_SPU_FEATURE_TDD_COUNT SPU_FEATURE_TDD_MaxCount
	Number of TDDs.

#define	NRF_SPU_FEATURE_MRAMC_COUNT SPU_FEATURE_MRAMC_MaxCount
	Number of MRAMCs.

Enumerations
enum	nrf_spu_event_t { NRF_SPU_EVENT_RAMACCERR = offsetof(NRF_SPU_Type, EVENTS_RAMACCERR) , NRF_SPU_EVENT_FLASHACCERR = offsetof(NRF_SPU_Type, EVENTS_FLASHACCERR) , NRF_SPU_EVENT_PERIPHACCERR = offsetof(NRF_SPU_Type, EVENTS_PERIPHACCERR) }
	SPU events. More...

enum	nrf_spu_int_mask_t { NRF_SPU_INT_RAMACCERR_MASK = SPU_INTENSET_RAMACCERR_Msk , NRF_SPU_INT_FLASHACCERR_MASK = SPU_INTENSET_FLASHACCERR_Msk , NRF_SPU_INT_PERIPHACCERR_MASK = SPU_INTENSET_PERIPHACCERR_Msk }
	SPU interrupts. More...

enum	nrf_spu_nsc_size_t { NRF_SPU_NSC_SIZE_DISABLED = 0 , NRF_SPU_NSC_SIZE_32B = 1 , NRF_SPU_NSC_SIZE_64B = 2 , NRF_SPU_NSC_SIZE_128B = 3 , NRF_SPU_NSC_SIZE_256B = 4 , NRF_SPU_NSC_SIZE_512B = 5 , NRF_SPU_NSC_SIZE_1024B = 6 , NRF_SPU_NSC_SIZE_2048B = 7 , NRF_SPU_NSC_SIZE_4096B = 8 }
	SPU Non-Secure Callable (NSC) region size. More...

enum	nrf_spu_mem_perm_t { NRF_SPU_MEM_PERM_EXECUTE = SPU_FLASHREGION_PERM_EXECUTE_Msk , NRF_SPU_MEM_PERM_WRITE = SPU_FLASHREGION_PERM_WRITE_Msk , NRF_SPU_MEM_PERM_READ = SPU_FLASHREGION_PERM_READ_Msk }
	SPU memory region permissions. More...

enum	nrf_spu_securemapping_t { NRF_SPU_SECUREMAPPING_NONSECURE = SPU_PERIPH_PERM_SECUREMAPPING_NonSecure , NRF_SPU_SECUREMAPPING_SECURE = SPU_PERIPH_PERM_SECUREMAPPING_Secure , NRF_SPU_SECUREMAPPING_USERSELECTABLE = SPU_PERIPH_PERM_SECUREMAPPING_UserSelectable , NRF_SPU_SECUREMAPPING_SPLIT = SPU_PERIPH_PERM_SECUREMAPPING_Split }
	SPU read capabilities for TrustZone Cortex-M secure attribute. More...

enum	nrf_spu_dma_t { NRF_SPU_DMA_NODMA = SPU_PERIPH_PERM_DMA_NoDMA , NRF_SPU_DMA_NOSEPARATEATTRIBUTE = SPU_PERIPH_PERM_DMA_NoSeparateAttribute , NRF_SPU_DMA_SEPARATEATTRIBUTE = SPU_PERIPH_PERM_DMA_SeparateAttribute }
	SPU DMA capabilities. More...

enum	nrf_spu_feature_t { NRF_SPU_FEATURE_IPCT_CHANNEL , NRF_SPU_FEATURE_IPCT_INTERRUPT , NRF_SPU_FEATURE_DPPI_CHANNEL , NRF_SPU_FEATURE_DPPI_CHANNEL_GROUP , NRF_SPU_FEATURE_GPIOTE_CHANNEL , NRF_SPU_FEATURE_GPIOTE_INTERRUPT , NRF_SPU_FEATURE_GPIO_PIN , NRF_SPU_FEATURE_GRTC_CC , NRF_SPU_FEATURE_GRTC_SYSCOUNTER , NRF_SPU_FEATURE_GRTC_INTERRUPT , NRF_SPU_FEATURE_BELLS_BELL , NRF_SPU_FEATURE_TDD , NRF_SPU_FEATURE_MRAMC_WAITSTATES , NRF_SPU_FEATURE_MRAMC_AUTODPOWERDOWN , NRF_SPU_FEATURE_MRAMC_READY }
	SPU features. More...

Functions
NRF_STATIC_INLINE void	nrf_spu_event_clear (NRF_SPU_Type *p_reg, nrf_spu_event_t event)
	Function for clearing a specific SPU event.

NRF_STATIC_INLINE bool	nrf_spu_event_check (NRF_SPU_Type const *p_reg, nrf_spu_event_t event)
	Function for retrieving the state of the SPU event.

NRF_STATIC_INLINE void	nrf_spu_int_enable (NRF_SPU_Type *p_reg, uint32_t mask)
	Function for enabling specified interrupts.

NRF_STATIC_INLINE void	nrf_spu_int_disable (NRF_SPU_Type *p_reg, uint32_t mask)
	Function for disabling specified interrupts.

NRF_STATIC_INLINE uint32_t	nrf_spu_int_enable_check (NRF_SPU_Type const *p_reg, uint32_t mask)
	Function for checking if the specified interrupts are enabled.

NRF_STATIC_INLINE void	nrf_spu_publish_set (NRF_SPU_Type *p_reg, nrf_spu_event_t event, uint32_t channel)
	Function for setting up publication configuration of a given SPU event.

NRF_STATIC_INLINE void	nrf_spu_publish_clear (NRF_SPU_Type *p_reg, nrf_spu_event_t event)
	Function for clearing publication configuration of a given SPU event.

NRF_STATIC_INLINE bool	nrf_spu_tz_is_available (NRF_SPU_Type const *p_reg)
	Function for retrieving the capabilities of the current device.

NRF_STATIC_INLINE void	nrf_spu_dppi_config_set (NRF_SPU_Type *p_reg, uint8_t dppi_id, uint32_t channels_mask, bool lock_conf)
	Function for configuring the DPPI channels to be available in particular domains.

NRF_STATIC_INLINE void	nrf_spu_gpio_config_set (NRF_SPU_Type *p_reg, uint8_t gpio_port, uint32_t gpio_mask, bool lock_conf)
	Function for configuring the GPIO pins to be available in particular domains.

NRF_STATIC_INLINE void	nrf_spu_flashnsc_set (NRF_SPU_Type *p_reg, uint8_t flash_nsc_id, nrf_spu_nsc_size_t flash_nsc_size, uint8_t region_number, bool lock_conf)
	Function for configuring non-secure callable flash region.

NRF_STATIC_INLINE void	nrf_spu_ramnsc_set (NRF_SPU_Type *p_reg, uint8_t ram_nsc_id, nrf_spu_nsc_size_t ram_nsc_size, uint8_t region_number, bool lock_conf)
	Function for configuring non-secure callable RAM region.

NRF_STATIC_INLINE void	nrf_spu_flashregion_set (NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)
	Function for configuring security for a particular flash region.

NRF_STATIC_INLINE void	nrf_spu_ramregion_set (NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)
	Function for configuring security for the RAM region.

NRF_STATIC_INLINE void	nrf_spu_peripheral_set (NRF_SPU_Type *p_reg, uint32_t peripheral_id, bool secure_attr, bool secure_dma, bool lock_conf)
	Function for configuring access permissions of the peripheral.

NRF_STATIC_INLINE void	nrf_spu_extdomain_set (NRF_SPU_Type *p_reg, uint32_t domain_id, bool secure_attr, bool lock_conf)
	Function for configuring bus access permissions of the specified external domain.

NRF_STATIC_INLINE uint32_t	nrf_spu_periphaccerr_address_get (NRF_SPU_Type const *p_reg)
	Function for getting the address of the security violation.

NRF_STATIC_INLINE nrf_owner_t	nrf_spu_periphaccerr_ownerid_get (NRF_SPU_Type const *p_reg)
	Function for getting the owner ID of the security violation.

NRF_STATIC_INLINE nrf_spu_securemapping_t	nrf_spu_periph_perm_securemapping_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the capabilities for TrustZone Cortex-M secure attribute of the specified slave.

NRF_STATIC_INLINE nrf_spu_dma_t	nrf_spu_periph_perm_dma_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the DMA capabilities of the specified slave.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_secattr_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the security mapping of the specified slave.

NRF_STATIC_INLINE void	nrf_spu_periph_perm_secattr_set (NRF_SPU_Type *p_reg, uint8_t index, bool enable)
	Function for setting the security mapping of the specified slave.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_dmasec_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the security attribution for the DMA transfer of the specified slave.

NRF_STATIC_INLINE void	nrf_spu_periph_perm_dmasec_set (NRF_SPU_Type *p_reg, uint8_t index, bool enable)
	Function for setting the security attribution for the DMA transfer of the specified slave.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_block_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the status of the peripheral access lock of the specified slave.

NRF_STATIC_INLINE void	nrf_spu_periph_perm_block_enable (NRF_SPU_Type *p_reg, uint8_t index)
	Function for enabling the peripheral access lock of the specified slave.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_lock_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the status of the peripheral management lock of the specified slave.

NRF_STATIC_INLINE void	nrf_spu_periph_perm_lock_enable (NRF_SPU_Type *p_reg, uint8_t index)
	Function for enabling the peripheral management lock of the specified slave.

NRF_STATIC_INLINE nrf_owner_t	nrf_spu_periph_perm_ownerid_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the peripheral owner ID of the specified slave.

NRF_STATIC_INLINE void	nrf_spu_periph_perm_ownerid_set (NRF_SPU_Type *p_reg, uint8_t index, nrf_owner_t owner_id)
	Function for setting the peripheral owner ID of the specified slave.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_ownerprog_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the indication if owner ID of the specified slave is programmable or not.

NRF_STATIC_INLINE bool	nrf_spu_periph_perm_present_get (NRF_SPU_Type const *p_reg, uint8_t index)
	Function for getting the indication if peripheral with the specified slave index is present.

NRF_STATIC_INLINE bool	nrf_spu_feature_secattr_get (NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for getting the security mapping of the specified feature.

NRF_STATIC_INLINE void	nrf_spu_feature_secattr_set (NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex, bool enable)
	Function for setting the security mapping of the specified feature.

NRF_STATIC_INLINE bool	nrf_spu_feature_lock_get (NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for getting the status of the management lock of the specified feature.

NRF_STATIC_INLINE void	nrf_spu_feature_lock_enable (NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for enabling the management lock of the specified feature.

NRF_STATIC_INLINE bool	nrf_spu_feature_block_get (NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for getting status of the access lock of the specified feature.

NRF_STATIC_INLINE void	nrf_spu_feature_block_enable (NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for enabling the feature block of the specified feature.

NRF_STATIC_INLINE nrf_owner_t	nrf_spu_feature_ownerid_get (NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)
	Function for getting the feature owner ID of the specified feature.

NRF_STATIC_INLINE void	nrf_spu_feature_ownerid_set (NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex, nrf_owner_t owner_id)
	Function for setting the feature owner ID of the specified feature.

Detailed Description

Hardware access layer for managing the System Protection Unit (SPU) peripheral.

Enumeration Type Documentation

◆ nrf_spu_dma_t

enum nrf_spu_dma_t

SPU DMA capabilities.

Enumerator
NRF_SPU_DMA_NODMA	Peripheral has no DMA capability.
NRF_SPU_DMA_NOSEPARATEATTRIBUTE	DMA transfers always have the same security attribute as assigned to the peripheral.
NRF_SPU_DMA_SEPARATEATTRIBUTE	DMA transfers can have a different security attribute than the one assigned to the peripheral.

◆ nrf_spu_event_t

enum nrf_spu_event_t

SPU events.

Enumerator
NRF_SPU_EVENT_RAMACCERR	A security violation has been detected for the RAM memory space.
NRF_SPU_EVENT_FLASHACCERR	A security violation has been detected for the Flash memory space.
NRF_SPU_EVENT_PERIPHACCERR	A security violation has been detected on one or several peripherals.

◆ nrf_spu_feature_t

enum nrf_spu_feature_t

SPU features.

Enumerator
NRF_SPU_FEATURE_IPCT_CHANNEL	IPCT channel.
NRF_SPU_FEATURE_IPCT_INTERRUPT	IPCT interrupt.
NRF_SPU_FEATURE_DPPI_CHANNEL	DPPI channel.
NRF_SPU_FEATURE_DPPI_CHANNEL_GROUP	DPPI channel group.
NRF_SPU_FEATURE_GPIOTE_CHANNEL	GPIOTE channel.
NRF_SPU_FEATURE_GPIOTE_INTERRUPT	GPIOTE interrupt.
NRF_SPU_FEATURE_GPIO_PIN	GPIO pin.
NRF_SPU_FEATURE_GRTC_CC	GRTC compare channel.
NRF_SPU_FEATURE_GRTC_SYSCOUNTER	GRTC SYSCOUNTER.
NRF_SPU_FEATURE_GRTC_INTERRUPT	GRTC interrupt.
NRF_SPU_FEATURE_BELLS_BELL	BELLS bell pair.
NRF_SPU_FEATURE_TDD	TDD.
NRF_SPU_FEATURE_MRAMC_WAITSTATES	MRAMC waitstates.
NRF_SPU_FEATURE_MRAMC_AUTODPOWERDOWN	MRAMC automatic power-down.
NRF_SPU_FEATURE_MRAMC_READY	MRAMC ready.

◆ nrf_spu_int_mask_t

enum nrf_spu_int_mask_t

SPU interrupts.

Enumerator
NRF_SPU_INT_RAMACCERR_MASK	Interrupt on RAMACCERR event.
NRF_SPU_INT_FLASHACCERR_MASK	Interrupt on FLASHACCERR event.
NRF_SPU_INT_PERIPHACCERR_MASK	Interrupt on PERIPHACCERR event.

◆ nrf_spu_mem_perm_t

enum nrf_spu_mem_perm_t

SPU memory region permissions.

Enumerator
NRF_SPU_MEM_PERM_EXECUTE	Allow code execution from particular memory region.
NRF_SPU_MEM_PERM_WRITE	Allow write operation on particular memory region.
NRF_SPU_MEM_PERM_READ	Allow read operation from particular memory region.

◆ nrf_spu_nsc_size_t

enum nrf_spu_nsc_size_t

SPU Non-Secure Callable (NSC) region size.

Enumerator
NRF_SPU_NSC_SIZE_DISABLED	Not defined as a non-secure callable region.
NRF_SPU_NSC_SIZE_32B	Non-Secure Callable region with a 32-byte size.
NRF_SPU_NSC_SIZE_64B	Non-Secure Callable region with a 64-byte size.
NRF_SPU_NSC_SIZE_128B	Non-Secure Callable region with a 128-byte size.
NRF_SPU_NSC_SIZE_256B	Non-Secure Callable region with a 256-byte size.
NRF_SPU_NSC_SIZE_512B	Non-Secure Callable region with a 512-byte size.
NRF_SPU_NSC_SIZE_1024B	Non-Secure Callable region with a 1024-byte size.
NRF_SPU_NSC_SIZE_2048B	Non-Secure Callable region with a 2048-byte size.
NRF_SPU_NSC_SIZE_4096B	Non-Secure Callable region with a 4096-byte size.

◆ nrf_spu_securemapping_t

enum nrf_spu_securemapping_t

SPU read capabilities for TrustZone Cortex-M secure attribute.

Enumerator
NRF_SPU_SECUREMAPPING_NONSECURE	Peripheral is always accessible as non-secure.
NRF_SPU_SECUREMAPPING_SECURE	Peripheral is always accessible as secure.
NRF_SPU_SECUREMAPPING_USERSELECTABLE	Non-secure or secure attribute for this peripheral is defined by the PERIPH[n].PERM register.
NRF_SPU_SECUREMAPPING_SPLIT	Peripheral implements the split security mechanism.

Function Documentation

◆ nrf_spu_dppi_config_set()

NRF_STATIC_INLINE void nrf_spu_dppi_config_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	dppi_id,
		uint32_t	channels_mask,
		bool	lock_conf
	)

Function for configuring the DPPI channels to be available in particular domains.

Channels are configured as bitmask. Set one in bitmask to make channels available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	dppi_id	DPPI peripheral id.
[in]	channels_mask	Bitmask with channels configuration.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_event_check()

NRF_STATIC_INLINE bool nrf_spu_event_check	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_event_t	event
	)

Function for retrieving the state of the SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to be checked.

Return values

true	The event has been generated.
false	The event has not been generated.

◆ nrf_spu_event_clear()

NRF_STATIC_INLINE void nrf_spu_event_clear	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event
	)

Function for clearing a specific SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to clear.

◆ nrf_spu_extdomain_set()

NRF_STATIC_INLINE void nrf_spu_extdomain_set	(	NRF_SPU_Type *	p_reg,
		uint32_t	domain_id,
		bool	secure_attr,
		bool	lock_conf
	)

Function for configuring bus access permissions of the specified external domain.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	domain_id	ID number of a particular external domain.
[in]	secure_attr	Specifies if the bus accesses from this domain have the secure attribute set.
[in]	lock_conf	Specifies if the configuration should be locked until next SoC reset.

◆ nrf_spu_feature_block_enable()

NRF_STATIC_INLINE void nrf_spu_feature_block_enable	(	NRF_SPU_Type *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for enabling the feature block of the specified feature.

Note: When feature access lock is enabled, reading or modifying the registers of the feature is blocked.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

◆ nrf_spu_feature_block_get()

NRF_STATIC_INLINE bool nrf_spu_feature_block_get	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for getting status of the access lock of the specified feature.

Note: When feature access lock is enabled, reading or modifying the registers of the feature is blocked.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

Returns: True if the feature access is locked, false otherwise.

◆ nrf_spu_feature_lock_enable()

NRF_STATIC_INLINE void nrf_spu_feature_lock_enable	(	NRF_SPU_Type *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for enabling the management lock of the specified feature.

Note: When feature management lock is enabled, modifying the SPU configuration associated with specified feature is not possible.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

◆ nrf_spu_feature_lock_get()

NRF_STATIC_INLINE bool nrf_spu_feature_lock_get	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for getting the status of the management lock of the specified feature.

Note: When feature management lock is enabled, modifying the SPU configuration associated with specified feature is not possible.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

Returns: True if feature management is locked, false otherwise.

◆ nrf_spu_feature_ownerid_get()

NRF_STATIC_INLINE nrf_owner_t nrf_spu_feature_ownerid_get	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for getting the feature owner ID of the specified feature.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

Returns: Owner ID.

◆ nrf_spu_feature_ownerid_set()

NRF_STATIC_INLINE void nrf_spu_feature_ownerid_set	(	NRF_SPU_Type *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex,
		nrf_owner_t	owner_id
	)

Function for setting the feature owner ID of the specified feature.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.
[in]	owner_id	Owner ID to be set.

◆ nrf_spu_feature_secattr_get()

NRF_STATIC_INLINE bool nrf_spu_feature_secattr_get	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex
	)

Function for getting the security mapping of the specified feature.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.

Return values

true	Feature is available for secure usage.
false	Feature is available for non-secure usage.

◆ nrf_spu_feature_secattr_set()

NRF_STATIC_INLINE void nrf_spu_feature_secattr_set	(	NRF_SPU_Type *	p_reg,
		nrf_spu_feature_t	feature,
		uint8_t	index,
		uint8_t	subindex,
		bool	enable
	)

Function for setting the security mapping of the specified feature.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	feature	Feature to be accessed.
[in]	index	Feature index.
[in]	subindex	Feature subindex. Only used for applicable features, otherwise skipped.
[in]	enable	True if security mapping is to be set, false otherwise.

◆ nrf_spu_flashnsc_set()

NRF_STATIC_INLINE void nrf_spu_flashnsc_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	flash_nsc_id,
		nrf_spu_nsc_size_t	flash_nsc_size,
		uint8_t	region_number,
		bool	lock_conf
	)

Function for configuring non-secure callable flash region.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	flash_nsc_id	Non-secure callable flash region ID.
[in]	flash_nsc_size	Non-secure callable flash region size.
[in]	region_number	Flash region number.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_flashregion_set()

NRF_STATIC_INLINE void nrf_spu_flashregion_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	region_id,
		bool	secure_attr,
		uint32_t	permissions,
		bool	lock_conf
	)

Function for configuring security for a particular flash region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	region_id	Flash region index.
[in]	secure_attr	Set region attribute to secure.
[in]	permissions	Flash region permissions.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_gpio_config_set()

NRF_STATIC_INLINE void nrf_spu_gpio_config_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	gpio_port,
		uint32_t	gpio_mask,
		bool	lock_conf
	)

Function for configuring the GPIO pins to be available in particular domains.

GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	gpio_port	Port number.
[in]	gpio_mask	Bitmask with gpio configuration.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_int_disable()

NRF_STATIC_INLINE void nrf_spu_int_disable	(	NRF_SPU_Type *	p_reg,
		uint32_t	mask
	)

Function for disabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Mask of interrupts to be disabled. Use nrf_spu_int_mask_t values for bit masking.

◆ nrf_spu_int_enable()

NRF_STATIC_INLINE void nrf_spu_int_enable	(	NRF_SPU_Type *	p_reg,
		uint32_t	mask
	)

Function for enabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Mask of interrupts to be enabled. Use nrf_spu_int_mask_t values for bit masking.

◆ nrf_spu_int_enable_check()

NRF_STATIC_INLINE uint32_t nrf_spu_int_enable_check	(	NRF_SPU_Type const *	p_reg,
		uint32_t	mask
	)

Function for checking if the specified interrupts are enabled.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Mask of interrupts to be checked. Use nrf_spu_int_mask_t values for bit masking.

Returns: Mask of enabled interrupts.

◆ nrf_spu_periph_perm_block_enable()

NRF_STATIC_INLINE void nrf_spu_periph_perm_block_enable	(	NRF_SPU_Type *	p_reg,
		uint8_t	index
	)

Function for enabling the peripheral access lock of the specified slave.

Note: When peripheral access lock is enabled, reading or modifying the registers of the peripheral is blocked.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

◆ nrf_spu_periph_perm_block_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_block_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the status of the peripheral access lock of the specified slave.

Note: When peripheral access lock is enabled, reading or modifying the registers of the peripheral is blocked.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: True if the peripheral access is locked, false otherwise.

◆ nrf_spu_periph_perm_dma_get()

NRF_STATIC_INLINE nrf_spu_dma_t nrf_spu_periph_perm_dma_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the DMA capabilities of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: DMA capabilities.

◆ nrf_spu_periph_perm_dmasec_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_dmasec_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the security attribution for the DMA transfer of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: True if DMA transfers initiated by this peripheral have the secure attribute set, false otherwise.

◆ nrf_spu_periph_perm_dmasec_set()

NRF_STATIC_INLINE void nrf_spu_periph_perm_dmasec_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	index,
		bool	enable
	)

Function for setting the security attribution for the DMA transfer of the specified slave.

Note: This bit has effect only if peripheral security mapping is enabled.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.
[in]	enable	True if secure attribute for the DMA transfer is to be set, false otherwise.

◆ nrf_spu_periph_perm_lock_enable()

NRF_STATIC_INLINE void nrf_spu_periph_perm_lock_enable	(	NRF_SPU_Type *	p_reg,
		uint8_t	index
	)

Function for enabling the peripheral management lock of the specified slave.

Note: When peripheral management lock is enabled, modifying the SPU configuration associated with specified peripheral is not possible.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

◆ nrf_spu_periph_perm_lock_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_lock_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the status of the peripheral management lock of the specified slave.

Note: When peripheral management lock is enabled, modifying the SPU configuration associated with specified peripheral is not possible.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: True if the peripheral management is locked, false otherwise.

◆ nrf_spu_periph_perm_ownerid_get()

NRF_STATIC_INLINE nrf_owner_t nrf_spu_periph_perm_ownerid_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the peripheral owner ID of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: Owner ID.

◆ nrf_spu_periph_perm_ownerid_set()

NRF_STATIC_INLINE void nrf_spu_periph_perm_ownerid_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	index,
		nrf_owner_t	owner_id
	)

Function for setting the peripheral owner ID of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.
[in]	owner_id	Owner ID to be set.

◆ nrf_spu_periph_perm_ownerprog_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_ownerprog_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the indication if owner ID of the specified slave is programmable or not.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: True if owner ID is programmable, false otherwise.

◆ nrf_spu_periph_perm_present_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_present_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the indication if peripheral with the specified slave index is present.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: True if peripheral is present, false otherwise.

◆ nrf_spu_periph_perm_secattr_get()

NRF_STATIC_INLINE bool nrf_spu_periph_perm_secattr_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the security mapping of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Return values

true	Peripheral is mapped in secure peripheral address space.
false	If TrustZone capabilities are NRF_SPU_SECUREMAPPING_USERSELECTABLE, then peripheral is mapped in non-secure peripheral address space. If TrustZone capabilities are NRF_SPU_SECUREMAPPING_SPLIT, then peripheral is mapped in non-secure and secure peripheral address space.

◆ nrf_spu_periph_perm_secattr_set()

NRF_STATIC_INLINE void nrf_spu_periph_perm_secattr_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	index,
		bool	enable
	)

Function for setting the security mapping of the specified slave.

Note: This bit has effect only if TrustZone capabilities are either NRF_SPU_SECUREMAPPING_USERSELECTABLE or NRF_SPU_SECUREMAPPING_SPLIT.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.
[in]	enable	True if security mapping is to be set, false otherwise.

◆ nrf_spu_periph_perm_securemapping_get()

NRF_STATIC_INLINE nrf_spu_securemapping_t nrf_spu_periph_perm_securemapping_get	(	NRF_SPU_Type const *	p_reg,
		uint8_t	index
	)

Function for getting the capabilities for TrustZone Cortex-M secure attribute of the specified slave.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	index	Peripheral slave index.

Returns: TrustZone capabilities.

◆ nrf_spu_periphaccerr_address_get()

NRF_STATIC_INLINE uint32_t nrf_spu_periphaccerr_address_get ( NRF_SPU_Type const * p_reg )

Function for getting the address of the security violation.

Note: The event PERIPHACCERR must be cleared to clear this register.

Parameters

[in] p_reg Pointer to the structure of registers of the peripheral.

Returns: Address of the transaction that caused first error.

◆ nrf_spu_periphaccerr_ownerid_get()

NRF_STATIC_INLINE nrf_owner_t nrf_spu_periphaccerr_ownerid_get ( NRF_SPU_Type const * p_reg )

Function for getting the owner ID of the security violation.

Note: The event PERIPHACCERR must be cleared to clear this register.

Parameters

[in] p_reg Pointer to the structure of registers of the peripheral.

Returns: Owner ID of the transaction that caused first error.

◆ nrf_spu_peripheral_set()

NRF_STATIC_INLINE void nrf_spu_peripheral_set	(	NRF_SPU_Type *	p_reg,
		uint32_t	peripheral_id,
		bool	secure_attr,
		bool	secure_dma,
		bool	lock_conf
	)

Function for configuring access permissions of the peripheral.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	peripheral_id	ID number of a particular peripheral.
[in]	secure_attr	Peripheral registers accessible only from secure domain.
[in]	secure_dma	DMA transfers possible only from RAM memory in secure domain.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_publish_clear()

NRF_STATIC_INLINE void nrf_spu_publish_clear	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event
	)

Function for clearing publication configuration of a given SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to clear.

◆ nrf_spu_publish_set()

NRF_STATIC_INLINE void nrf_spu_publish_set	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event,
		uint32_t	channel
	)

Function for setting up publication configuration of a given SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to configure.
[in]	channel	Channel to connect with published event.

◆ nrf_spu_ramnsc_set()

NRF_STATIC_INLINE void nrf_spu_ramnsc_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	ram_nsc_id,
		nrf_spu_nsc_size_t	ram_nsc_size,
		uint8_t	region_number,
		bool	lock_conf
	)

Function for configuring non-secure callable RAM region.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	ram_nsc_id	Non-secure callable RAM region ID.
[in]	ram_nsc_size	Non-secure callable RAM region size.
[in]	region_number	RAM region number.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_ramregion_set()

NRF_STATIC_INLINE void nrf_spu_ramregion_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	region_id,
		bool	secure_attr,
		uint32_t	permissions,
		bool	lock_conf
	)

Function for configuring security for the RAM region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	region_id	RAM region index.
[in]	secure_attr	Set region attribute to secure.
[in]	permissions	RAM region permissions.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_tz_is_available()

NRF_STATIC_INLINE bool nrf_spu_tz_is_available ( NRF_SPU_Type const * p_reg )

Function for retrieving the capabilities of the current device.

Parameters

[in] p_reg Pointer to the structure of registers of the peripheral.

Return values

true	ARM TrustZone support is available.
false	ARM TrustZone support is not available.

Macros

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ nrf_spu_dma_t

◆ nrf_spu_event_t

◆ nrf_spu_feature_t

◆ nrf_spu_int_mask_t

◆ nrf_spu_mem_perm_t

◆ nrf_spu_nsc_size_t

◆ nrf_spu_securemapping_t

Function Documentation

◆ nrf_spu_dppi_config_set()

◆ nrf_spu_event_check()

◆ nrf_spu_event_clear()

◆ nrf_spu_extdomain_set()

◆ nrf_spu_feature_block_enable()

◆ nrf_spu_feature_block_get()

◆ nrf_spu_feature_lock_enable()

◆ nrf_spu_feature_lock_get()

◆ nrf_spu_feature_ownerid_get()

◆ nrf_spu_feature_ownerid_set()

◆ nrf_spu_feature_secattr_get()

◆ nrf_spu_feature_secattr_set()

◆ nrf_spu_flashnsc_set()

◆ nrf_spu_flashregion_set()

◆ nrf_spu_gpio_config_set()

◆ nrf_spu_int_disable()

◆ nrf_spu_int_enable()

◆ nrf_spu_int_enable_check()

◆ nrf_spu_periph_perm_block_enable()

◆ nrf_spu_periph_perm_block_get()

◆ nrf_spu_periph_perm_dma_get()

◆ nrf_spu_periph_perm_dmasec_get()

◆ nrf_spu_periph_perm_dmasec_set()

◆ nrf_spu_periph_perm_lock_enable()

◆ nrf_spu_periph_perm_lock_get()

◆ nrf_spu_periph_perm_ownerid_get()

◆ nrf_spu_periph_perm_ownerid_set()

◆ nrf_spu_periph_perm_ownerprog_get()

◆ nrf_spu_periph_perm_present_get()

◆ nrf_spu_periph_perm_secattr_get()

◆ nrf_spu_periph_perm_secattr_set()

◆ nrf_spu_periph_perm_securemapping_get()

◆ nrf_spu_periphaccerr_address_get()

◆ nrf_spu_periphaccerr_ownerid_get()

◆ nrf_spu_peripheral_set()

◆ nrf_spu_publish_clear()

◆ nrf_spu_publish_set()

◆ nrf_spu_ramnsc_set()

◆ nrf_spu_ramregion_set()

◆ nrf_spu_tz_is_available()