New and inherited anomalies

The following anomalies are present in revision Rev 2 of the nRF52840 chip.

Table 1. New and inherited anomalies
ID Module Description Inherited from Engineering D nRF52840
20 RTC Register values are invalid X
36 CLOCK Some registers are not reset when expected X
55 I2S RXPTRUPD and TXPTRUPD events asserted after STOP X
66 TEMP Linearity specification not met with default settings X
78 TIMER High current consumption when using timer STOP task only X
81 GPIO PIN_CNF is not retained when in debug interface mode X
87 CPU Unexpected wake from System ON Idle when using FPU X
122 QSPI QSPI uses current after being disabled X
136 System Bits in RESETREAS are set when they should not be X
153 RADIO RSSI parameter adjustment X
155 GPIOTE IN event may occur more than once on input edge X
166 USBD ISO double buffering not functional X
170 I2S NRF_I2S->PSEL CONNECT fields are not readable X
171 USB,USBD USB might not power up X
172 RADIO BLE long range co-channel performance X
173 GPIO Writes to LATCH register take several CPU cycles to take effect X
174 SPIM SPIM3 events incorrectly connected to the PPI X
176 System Flash erase through CTRL-AP fails due to watchdog time-out X
179 RTC COMPARE event is generated twice from a single RTC compare match X
183 PWM False SEQEND[0] and SEQEND[1] events X
184 NVMC Erase or write operations from the external debugger fail when CPU is not halted X
187 USBD USB cannot be enabled X
190 NFCT Event FIELDDETECTED may be generated too early X
191 RADIO High packet error rate in BLE Long Range mode X
193 SPIM SPIM3 does not generate EVENTS_END and halts if suspended during last byte X
194 I2S STOP task does not switch off all resources X
195 SPIM SPIM3 continues to draw current after disable X
196 I2S PSEL acquires GPIOs regardless of ENABLE X
198 SPIM SPIM3 transmit data might be corrupted X
199 USBD USBD cannot receive tasks during DMA X
204 RADIO Switching beween TX and RX causes unwanted emissions X
208 QSPI PPI Deactivate task does not switch off all resources X
209 CLOCK LFRC ULP mode calibration not functional X
210 GPIO Bits in GPIO LATCH register are incorrectly set to 1 X
213 WDT WDT configuration is cleared when entering system OFF X
214 SPIS Incorrect data transferred X
215 QSPI Reading QSPI registers after XIP might halt CPU X
219 TWIM I2C timing spec is violated at 400 kHz X