[215] QSPI: Reading QSPI registers after XIP might halt CPU

This anomaly applies to Revision 2, build codes CKAA-Dx0, QIAA-Dx0.

It was inherited from the previous IC revision Engineering D.

Symptoms

CPU halts.

Conditions

Init and start QSPI, use XIP, then write to or read any QSPI register with an offset above 0x600.

Consequences

CPU halts.

Workaround

Trigger QSPI TASKS_ACTIVATE after XIP is used and wait for QSPI EVENTS_READY before accessing any QSPI register with an offset above 0x600.