This section provides design recommendations and layout guidelines for each nRF9160 pin
for a successful integration of nRF9160.
VSS VSS (pin 103) is the main electrical ground connection between nRF9160 and the application board. It is also the main thermal dissipation path from nRF9160 and the main mechanical connection.
GND_Shield
The following ground pins are dedicated for the embedded microshield: 1, 5–9, 11, 14, 17, 21, 27, 31, 36, 41, 44, 47, 50, 52, 56, 60, 62, 63, 65, 66, 68, 69, 72, 74–82, 85, 90, 94, and 98.
ENABLE ENABLE (pin 101) is a high-impedance control pin for the nRF9160-internal PMU.
VDD1 and VDD2
Power supply design is one of the main factors in achieving good RF performance, low current consumption, and reliable behavior of a product over its life time in various conditions. VDD1 (pin 102) and VDD2 (pin 22) are the main power supply inputs for nRF9160 and form the combined VDD.
VDD_GPIO VDD_GPIO (pin 12) is the supply for application GPIOs P0.00–P0.31 and the COEX interface (pins 91–93) that is provided externally.
GPIOs P0.00–P0.31
The application GPIO pins (2–4, 15, 16, 18–20, 23–26, 28–30, 35, 37–40, 42, 83, 84, 86–89, 95–97, 99, and 100) are used for interfacing and communicating with application peripherals like sensors, ICs, external memories, buttons, and LEDs.
DEC0 DEC0 (pin 13) is an nRF9160-internal power management unit (PMU) output pin for an external decoupling capacitor.
nRESET nRESET (pin 32) is a dedicated SoC reset pin. A SoC reset is generated when the nRESET pin is pulled low and released. To ensure that the reset is issued correctly, the reset pin should be held low for a few microseconds.
SWD
The SWD interface provides a non-intrusive mechanism for debugging and tracing nRF9160. It can also be used for programming the firmware and accessing registers.
UICC
The UICC interface is also known as the USIM or SIM interface. It consists of SIM_RST (pin 43), SIM_DET (pin 45), SIM_CLK (pin 46), SIM_IO (pin 48), and SIM_1V8 (pin 49).
MAGPIO
The MAGPIO interface consists of digital 1.8 V I/O pins 53–55 that can be controlled by the LTE modem and nRF9160 application processor.
ANT ANT (pin 61) is a 50 Ω single-end interface for the LTE antenna for cellular bands. To ensure good performance, antenna impedance and the characteristic impedance of the transmission line connecting the antenna to the ANT pin must be 50 Ω. Impedance mismatch leads to performance deterioration.
AUX AUX (pin 64) is a 50 Ω single-end auxiliary port that can be used to loop back the signal that is fed into the ANT pin. AUX can be used when two radios share an antenna. For example, when using a combined GPS and LTE antenna, an internal RF switch in nRF9160 provides the needed isolation between the GPS and LTE paths.
GPS GPS (pin 67) is a 50 Ω single-end interface for the GPS antenna.
COEX
The COEX interface consists of pins 91–93. It is dedicated for RF interference avoidance towards a companion radio device, such as an external positioning device or Bluetooth®
Low Energy device.
Reserved
Pins 10, 51, 70, 71, 73, and 104–127 are reserved for Nordic's internal diagnostic purposes.