MIPI RF front-end

MIPI RF Front-End Control Interface (RFFE) is a dedicated RF front-end component control interface.

It consists of VIO (pin 57), SCLK (pin 58), and SDATA (pin 59). VIO is a 1.8 V supply for the MIPI controller, SCLK is the clock for the controller, and SDATA is for the control data. The MIPI RFFE interface is aligned with the LTE protocol, which enables LTE protocol synchronous control for nRF9160-external components, such as an antenna tuner.

nRF9160 supports MIPI RFFE v1.1 with the following exceptions:

SCLK is fixed rate 19.2 MHz.
Only one MIPI RFFE component is supported at a time.
The VIO voltage may be high at any time when nRF9160 is active, not only when external RFFE components are used.
The capacitive load of SCLK and SDATA must not exceed 15 pF on the application board.

For noise filtering and diagnostic purposes, it is recommended to add series resistors to SCLK (R3) and SDATA (R4). In addition to the series resistor, bypass capacitors (C14, C15, and C16) in the range of few pF can be considered. They may help to reduce RF coupling to the MIPI RFFE lines. Additional capacitance increases the MIPI RFFE load and potentially deteriorates signal integrity. By default, it is not recommended to assemble capacitors C14, C15, and C16.

Note: VIO should be assumed to be high when the LTE modem is active. Therefore, an external MIPI RFFE component should not have excessive current leakage at VIO in any conditions. Typically, VIO consumption or leakage in MIPI RFFE components is very low, but it is recommended to be verified from the component datasheet. External MIPI RFFE components must withstand a situation where VIO is high, but VDD low. Typically, this is acceptable, but some MIPI RFFE components may be more sensitive than others.

CAUTION:

The combined load of Printed Circuit Board (PCB) routing, input load of the MIPI RFFE component controller, and parasitic load from the application shall not exceed 15 pF at nRF9160's SCLK or SDATA pins. Typically, this load equals narrow transmission line length of ≤ 10 cm on the application board, but depends on the actual PCB design.