v1.0

GPIOs P0.00–P0.31

The application GPIO pins (2–4, 15, 16, 18–20, 23–26, 28–30, 35, 37–40, 42, 83, 84, 86–89, 95–97, 99, and 100) are used for interfacing and communicating with application peripherals like sensors, Integrated Circuit (IC)s, external memories, buttons, and LEDs.

GPIOs are powered from VDD_GPIO. They have the same voltage level as VDD_GPIO and any unwanted noise or spurious that VDD_GPIO may contain. Therefore, it is important to have proper noise filtering in VDD_GPIO (pin 12). It is also important for each individual GPIO pin to meet the filtering requirements specified for the peripherals connected to them. To avoid digital noise generated by the GPIOs, fast transients should be avoided. It is recommended to use the slowest possible rise times that the peripherals connected to the GPIOs allow.

To reduce transient currents, series resistors or ferrite beads can be used on the GPIO lines. For GPIOs, resistors in the range of 100 Ω to 1 kΩ can be considered as they are low current digital controls. Optimal resistor values depend mainly on the connected peripheral drive currents and communication speed or other application level requirements. In addition to the series resistor, bypass capacitors in the range of a few pF can be considered. They may help to reduce RF coupling to the GPIO lines. Unused GPIOs can be left electrically unconnected, but it is recommended to solder them to the application board for improved thermal and mechanical performance.

Note: Additional capacitance increases GPIO loading and noise originated from GPIO toggling.
Note: It is not recommended to use high voltage, high drive GPIO outputs with high frequency and high capacitance loads unless specifically needed, because it may increase the noise level and affect the performance of the Global Positioning System (GPS) and LTE radio receivers.