AAR — Accelerated address resolver

Accelerated address resolver is a cryptographic support function for implementing the Resolvable Private Address Resolution procedure described in Bluetooth Core Specification. Resolvable Private Address generation should be achieved using ECB and is not supported by AAR.

The procedure allows two devices that share a secret key to generate and resolve a hash based on their device address. The AAR block enables real-time address resolution on incoming packets when configured as described in this chapter. This allows real-time packet filtering (whitelisting) using a list of known shared keys (Identity Resolving Keys (IRK) in Bluetooth.

Parent topic: Peripherals

Shared resources

AAR shares the same AES module as the ECB and CCM peripherals. ECB will always have the lowest priority. If there is a sharing conflict during encryption, the ECB operation will be aborted and an ERRORECB event will be generated in the ECB peripheral.

Additionally, AAR shares registers and other resources with the peripherals that have the same ID as AAR. See Peripherals with shared ID for more information.

EasyDMA

AAR implements EasyDMA for reading and writing to RAM. EasyDMA will have finished accessing RAM when the END, RESOLVED, and NOTRESOLVED events are generated.

If the IRKPTR, ADDRPTR, and the SCRATCHPTR is not pointing to the Data RAM region, an EasyDMA transfer may result in a HardFault or RAM corruption. See Memory for more information about the different memory regions.

Resolving a resolvable address

A private resolvable address is composed of six bytes according to the Bluetooth Core Specification.

Figure 1. Resolvable address
A private resolvable address composed of 6 bytes.

To resolve an address, the register ADDRPTR must point to the start of the packet. The resolver is started by triggering the START task. A RESOLVED event is generated when AAR manages to resolve the address using one of the Identity Resolving Keys (IRK) found in the IRK data structure. AAR will use the IRK specified in the register IRK0 to IRK15 starting from IRK0. The register NIRK specifies how many IRKs should be used. The AAR module will generate a NOTRESOLVED event if it is not able to resolve the address using the specified list of IRKs.

AAR will go through the list of available IRKs in the IRK data structure and for each IRK try to resolve the address according to the Resolvable Private Address Resolution Procedure described in the Bluetooth Core specification. The time it takes to resolve an address varies due to the location in the list of the resolvable address. The resolution time will also be affected by RAM accesses performed by other peripherals and the CPU. See the Electrical specifications for more information about resolution time.

AAR only compares the received address to those programmed in the module without checking the address type.

AAR will stop as soon as it has managed to resolve the address, or after trying to resolve the address using NIRK number of IRKs from the IRK data structure. AAR will generate an END event after it has stopped.

Figure 2. Address resolution with packet preloaded into RAM
AAR address resolution

Example

The following example shows how to chain RADIO packet reception with address resolution using AAR.

AAR may be started as soon as the 6 bytes required by AAR have been received by RADIO and stored in RAM. The ADDRPTR pointer must point to the start of packet.

Figure 3. Address resolution with packet loaded into RAM by RADIO
Address resolution with packet loaded into RAM by RADIO

IRK data structure

The IRK data structure is located in RAM at the memory location specified by the IRKPTR register.

Table 1. IRK data structure overview
Property Address offset Description
IRK0 0 IRK number 0 (16 bytes)
IRK1 16 IRK number 1 (16 bytes)
.. .. ..
IRK15 240 IRK number 15 (16 bytes)

Registers

Table 2. Instances
Base address Domain Peripheral Instance Secure mapping DMA security Description Configuration
0x4100E000 NETWORK AAR AAR NS NA

Accelerated address resolver

    
Table 3. Register overview
Register Offset Security Description
TASKS_START 0x000  

Start resolving addresses based on IRKs specified in the IRK data structure

  
TASKS_STOP 0x008  

Stop resolving addresses

  
SUBSCRIBE_START 0x080  

Subscribe configuration for task START

  
SUBSCRIBE_STOP 0x088  

Subscribe configuration for task STOP

  
EVENTS_END 0x100  

Address resolution procedure complete

  
EVENTS_RESOLVED 0x104  

Address resolved

  
EVENTS_NOTRESOLVED 0x108  

Address not resolved

  
PUBLISH_END 0x180  

Publish configuration for event END

  
PUBLISH_RESOLVED 0x184  

Publish configuration for event RESOLVED

  
PUBLISH_NOTRESOLVED 0x188  

Publish configuration for event NOTRESOLVED

  
INTENSET 0x304  

Enable interrupt

  
INTENCLR 0x308  

Disable interrupt

  
STATUS 0x400  

Resolution status

  
ENABLE 0x500  

Enable AAR

  
NIRK 0x504  

Number of IRKs

  
IRKPTR 0x508  

Pointer to IRK data structure

  
ADDRPTR 0x510  

Pointer to the resolvable address

  
SCRATCHPTR 0x514  

Pointer to data area used for temporary storage

  
Parent topic: nRF5340 Product Specification

TASKS_START

Address offset: 0x000

Start resolving addresses based on IRKs specified in the IRK data structure

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                               A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A W

TASKS_START

    

Start resolving addresses based on IRKs specified in the IRK data structure

     

Trigger

1

Trigger task

Parent topic: nRF5340 Product Specification

TASKS_STOP

Address offset: 0x008

Stop resolving addresses

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                               A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A W

TASKS_STOP

    

Stop resolving addresses

     

Trigger

1

Trigger task

Parent topic: nRF5340 Product Specification

SUBSCRIBE_START

Address offset: 0x080

Subscribe configuration for task START

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

  

[255..0]

DPPI channel that task START will subscribe to

B RW

EN

      

     

Disabled

0

Disable subscription

     

Enabled

1

Enable subscription

Parent topic: nRF5340 Product Specification

SUBSCRIBE_STOP

Address offset: 0x088

Subscribe configuration for task STOP

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

  

[255..0]

DPPI channel that task STOP will subscribe to

B RW

EN

      

     

Disabled

0

Disable subscription

     

Enabled

1

Enable subscription

Parent topic: nRF5340 Product Specification

EVENTS_END

Address offset: 0x100

Address resolution procedure complete

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                               A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_END

    

Address resolution procedure complete

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

Parent topic: nRF5340 Product Specification

EVENTS_RESOLVED

Address offset: 0x104

Address resolved

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                               A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_RESOLVED

    

Address resolved

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

Parent topic: nRF5340 Product Specification

EVENTS_NOTRESOLVED

Address offset: 0x108

Address not resolved

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                               A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_NOTRESOLVED

    

Address not resolved

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

Parent topic: nRF5340 Product Specification

PUBLISH_END

Address offset: 0x180

Publish configuration for event END

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

  

[255..0]

DPPI channel that event END will publish to.

B RW

EN

      

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

Parent topic: nRF5340 Product Specification

PUBLISH_RESOLVED

Address offset: 0x184

Publish configuration for event RESOLVED

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

  

[255..0]

DPPI channel that event RESOLVED will publish to.

B RW

EN

      

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

Parent topic: nRF5340 Product Specification

PUBLISH_NOTRESOLVED

Address offset: 0x188

Publish configuration for event NOTRESOLVED

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

  

[255..0]

DPPI channel that event NOTRESOLVED will publish to.

B RW

EN

      

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

Parent topic: nRF5340 Product Specification

INTENSET

Address offset: 0x304

Enable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                           C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

END

    

Write '1' to enable interrupt for event END

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

RESOLVED

    

Write '1' to enable interrupt for event RESOLVED

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

NOTRESOLVED

    

Write '1' to enable interrupt for event NOTRESOLVED

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

Parent topic: nRF5340 Product Specification

INTENCLR

Address offset: 0x308

Disable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                           C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

END

    

Write '1' to disable interrupt for event END

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

RESOLVED

    

Write '1' to disable interrupt for event RESOLVED

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

NOTRESOLVED

    

Write '1' to disable interrupt for event NOTRESOLVED

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

Parent topic: nRF5340 Product Specification

STATUS

Address offset: 0x400

Resolution status

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                         A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

STATUS

  

[0..15]

The IRK that was used last time an address was resolved

Parent topic: nRF5340 Product Specification

ENABLE

Address offset: 0x500

Enable AAR

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                             A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

ENABLE

    

Enable or disable AAR

     

Disabled

0

Disable

     

Enabled

3

Enable

Parent topic: nRF5340 Product Specification

NIRK

Address offset: 0x504

Number of IRKs

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                       A A A A A
Reset 0x00000001 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
ID R/W Field Value ID Value Description
A RW

NIRK

  

[1..16]

Number of Identity Root Keys available in the IRK data structure

Parent topic: nRF5340 Product Specification

IRKPTR

Address offset: 0x508

Pointer to IRK data structure

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

IRKPTR

    

Pointer to the IRK data structure

Parent topic: nRF5340 Product Specification

ADDRPTR

Address offset: 0x510

Pointer to the resolvable address

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

ADDRPTR

    

Pointer to the resolvable address (6-bytes)

Parent topic: nRF5340 Product Specification

SCRATCHPTR

Address offset: 0x514

Pointer to data area used for temporary storage

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

SCRATCHPTR

    

Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved.

Parent topic: nRF5340 Product Specification

Electrical specification

Parent topic: nRF5340 Product Specification

AAR Electrical Specification

Symbol Description Min. Typ. Max. Units
tAAR

Address resolution time per IRK. Total time for several IRKs is given as (1 µs + n * t_AAR), where n is the number of IRKs. (Given priority to the actual destination RAM block).

 6.1 µs
tAAR,8

Time for address resolution of 8 IRKs. (Given priority to the actual destination RAM block).

 49 µs
Parent topic: nRF5340 Product Specification
This document was last updated on 2023-12-04.
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