1 |
I2S |
I2S not functional
|
X |
2 |
PWM |
PWM not functional
|
X |
3 |
PDM |
PDM not functional
|
X |
4 |
MWU |
MWU not functional
|
X |
7 |
NVMC,System |
Cache is not functional
|
X |
8 |
SAADC |
Increased current consumption in system ON-IDLE
|
X |
9 |
QDEC |
Some features are not functional
|
X |
10 |
RTC |
RTC2 is not functional
|
X |
11 |
System |
Device is unable to stay in System OFF mode
|
X |
12 |
COMP |
Reference ladder is not correctly calibrated
|
X |
15 |
POWER |
RAM[x].POWERSET/CLR read as zero
|
X |
16 |
System |
RAM may be corrupt on wakeup from CPU IDLE
|
X |
17 |
NFCT |
The EVENTS_FIELDLOST is not generated
|
X |
20 |
RTC |
Register values are invalid
|
X |
23 |
SPIM |
END event is generated before ENDTX
|
X |
24 |
NFCT |
The FIELDPRESENT register read is not reliable
|
X |
25 |
NFCT |
Reset value of SENSRES register is incorrect
|
X |
26 |
NFCT |
NFC field does not wakeup the device from emulated system OFF
|
X |
27 |
NFCT |
Triggering NFCT ACTIVATE task also activates the Rx easyDMA
|
X |
28 |
SAADC |
Scan mode is not functional for some analog inputs
|
X |
29 |
TWIS |
Incorrect bits in ERRORSRC
|
X |
30 |
TWIS |
STOP Task is not functional
|
X |
31 |
CLOCK |
Calibration values are not correctly loaded from FICR at reset
|
X |
32 |
DIF |
Debug session automatically enables TracePort pins
|
X |
33 |
System |
Code RAM is located at wrong address
|
X |
34 |
System |
Code and Data RAM are not mapped from the same physical RAM
|
X |
35 |
CLOCK |
HFCLK can draw current when not requested
|
X |
36 |
CLOCK |
Some registers are not reset when expected
|
X |
37 |
RADIO |
Encryption engine is slow by default.
|
X |
38 |
PPI |
Enable/disable tasks for channel group 4 and 5 cannot be triggered through PPI
|
X |
39 |
NFCT |
The automatic collision resolution does not handle CRC and parity errors
|
X |
40 |
NFCT |
The FRAMEDELAYMODE = WindowGrid is not supported
|
X |
41 |
GPIO |
PIN_CNF[x] registers not reset after pin reset
|
X |
42 |
PPI |
FORK on the fixed channels is not functional
|
X |
43 |
SPIS |
SPIS0 is not functional
|
X |
44 |
NVMC |
Read after flash erase is unpredictable
|
X |
46 |
SPIM,TWIM |
EasyDMA list not functional
|
X |
47 |
DIF |
Trace is not functional
|
X |
48 |
DIF |
SWO only works if Trace is enabled.
|
X |
49 |
RTC |
RTC is not functional after LFCLK is restarted
|
X |
57 |
NFCT |
NFC Modulation amplitude
|
X |
58 |
SPIM |
An additional byte is clocked out when RXD.MAXCNT = 1
|
X |
63 |
POWER |
DC/DC does not automatically switch off in System ON IDLE
|
X |
64 |
NFCT |
Only full bytes can be received or transmitted, but supports 4-bit frame transmit
|
X |
65 |
POWER |
RAM[] registers mapping of RAM block and sections is wrong
|
X |
67 |
NFCT,PPI |
Some events cannot be used with the PPI
|
X |
68 |
CLOCK |
EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
|
X |
70 |
COMP |
Not able to wake CPU from System ON IDLE
|
X |
71 |
CLOCK |
RCOSC calibration
|
X |
72 |
NFCT,PPI |
TASKS_ACTIVATE cannot be used with the PPI
|
X |
73 |
TIMER |
Event lost
|
X |
74 |
SAADC |
Started events fires prematurely
|
X |
77 |
CLOCK |
RC oscillator is not calibrated when first started
|
X |
78 |
TIMER |
High current consumption when using timer STOP task only
|
X |
84 |
COMP |
ISOURCE not functional
|
X |
86 |
SAADC |
Triggering START task after offset calibration may write a sample to RAM
|
X |
87 |
CPU |
Unexpected wake from System ON Idle when using FPU
|
X |
88 |
WDT |
Increased current consumption when configured to pause in System ON idle
|
X |
97 |
GPIOTE |
High current consumption in System ON Idle mode
|
X |