This anomaly applies to IC Rev. Engineering A, build codes QFAA-AA0, QFAA-AC0, CGAA-AA0.
Device wakes immediately from System OFF. Performing pin reset shows "wake-up from power off" as well as pin reset in POWER.RESETREAS.
When PORT event is configured to wake from System OFF
Device does not stay in System OFF.
The wake on pin function needs to detect a valid wake-up condition before entering system OFF. This requires the temporary use of one GPIO pin in output mode. The workaround only needs to be executed when waking from POR or BOR reset, that is, when POWER.RESETREAS = 0x0000 0000 after wake up.
In the following example, GPIO P0.24 is used for the workaround, but any GPIO pin can be used by replacing "24" with another port pin number. The selected pin will momentarily be driven low by the workaround code.
#define GPIO_SENSE_PIN (24)
/* Configure a GPIO as input, detecting low level. */
NRF_P0->PIN_CNF[GPIO_SENSE_PIN] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
/* Ensure that the level is low. */
NRF_P0->OUTCLR = 1UL << GPIO_SENSE_PIN;
/* Unconfigure the used GPIO. */
NRF_P0->PIN_CNF[GPIO_SENSE_PIN] = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);