The nRF52840 System on Chip (SoC) controls analog switches on the nRF9160 DK, enabling routing of some of the nRF9160 General-Purpose Input/Output (GPIO) pins to onboard functionality, for example LEDs, or the regular GPIO interfaces.
For details on which GPIOs on the nRF9160 DK can be routed by these analog switches, see the following table.
| Name | nRF52 control GPIO | Hardware default | nRF9160 GPIO | External1 | Default | Optional |
|---|---|---|---|---|---|---|
| nRF91_UART1 (nRF91_APP1) | P1.14 | 0 | P0.26 | P6_pin6 (D19) | VCOM0_RTS | – |
| P0.27 | P6_pin7 (D20) | VCOM0_CTS | – | |||
| P0.28 | P6_pin8 (D21) | VCOM0_TXD | – | |||
| P0.29 | P24_pin4 (D22) | VCOM0_RXD | – | |||
| nRF91_UART2 (nRF91_APP2) | P1.12 | 1 | P0.01 | P3_pin2 (D1) | VCOM2_RXD | – |
| P0.00 | P3_pin1 (D0) | VCOM2_TXD | – | |||
| P0.15/ AIN2 | P2_pin2 (A1) | VCOM2_RTS | – | |||
| P0.14/ AIN1 | P2_pin1 (A0) | VCOM2_CTS | – | |||
| nRF91_LED1 | P1.05 | 0 | P0.02 | P3_pin3 (D2) | LED 1 | – |
| nRF91_LED2 | P1.07 | 0 | P0.03 | P3_pin4 (D3) | LED 2 | – |
| nRF91_LED3 | P1.01 | 0 | P0.04 | P3_pin5 (D4) | LED 3 | – |
| nRF91_LED4 | P1.03 | 0 | P0.05 | P3_pin6 (D5) | LED 4 | – |
| nRF91_SWITCH1 | P1.09 | 0 | P0.08 | P3_pin7 (D6) | Switch 1 | – |
| nRF91_SWITCH2 | P0.08 | 0 | P0.09 | P3_pin8 (D7) | Switch 2 | – |
| nRF91_BUTTON1 | P0.06 | 0 | P0.062 | P4_pin1 (D8) | Button 1 | – |
| nRF91_BUTTON2 | P0.26 | 0 | P0.07 | P4_pin2 (D9) | Button 2 | – |
| nRF_IF0-2_CTRL (nRF91_GPIO) | P0.13 | 0 | P0.17/ AIN4 | P2_pin4 (A3) | – | nRF52_P0.17 |
| P0.18/ AIN5 | P2_pin5 (A4) | – | nRF52_P0.20 | |||
| P0.19/ AIN6 | P2_pin6 (A5) | – | nRF52_P0.15 | |||
| nRF_IF3-5_CTRL (nRF91_TRACE) | P0.24 | 0 | P0.21 | P6_pin1 (D14) / P25_pin12 (TRACECLK) | – | nRF52_P0.22 |
| P0.22 | P6_pin2 (D15) / P25_pin14 (TRACEDATA0)3 | – | nRF52_P1.04 | |||
| P0.23 | P6_pin3 (D16) / P25_pin16 (TRACEDATA1)3 | – | nRF52_P1.02 | |||
| nRF_IF6-8_CTRL (nRF91_COEX) | P1.10 | 0 | GPS_EN | P24_pin1 (COEX0) | – | nRF52_P1.13 |
| COEX1 | P24_pin2 (COEX1) | – | nRF52_P1.11 | |||
| COEX2 | P24_pin3 (COEX2) | – | nRF52_P1.15 | |||
| nRF_IF9_CTRL | P0.16 | 0 | P0.24 | P6_pin4 (D17) / P25_pin28 (TRACEDATA2)3 | – | nRF52_P0.18_Reset |
| IO_EXP_EN | P0.14 | 0 | P0.062 | P3_pin7 (D6) | – | IO_EXP nINT |
| P0.30 | P4_pin9 (SDA) | – | IO_EXP SDA | |||
| P0.31 | P4_pin10 (SCL) | – | IO_EXP SCL | |||
| EXT_MEM_CTRL | P0.19 | 0 | P0.11 (MOSI) | P4_pin4 (D11) | – | EXT_FLASH SI |
| P0.12 (MISO) | P4_pin5 (D12) | – | EXT_FLASH SO | |||
| P0.13/ AIN0 (SCK) | P4_pin6 (D13) | – | EXT_FLASH CSK | |||
| P0.25 (nCS) | P6_pin5 (D18) / P25_pin20 (TRACEDATA3)3,4 | – | EXT_FLASH nCS | |||
| 1For the location of connectors, see nRF9160 DK (PCA10090), front view. 2When the I/O expander is enabled, the interrupt line from the I/O expander shares the same GPIO as Button 1. 3Pins are shared with TRACE, and when TRACE functionality is to be used, make sure that the nRF52 control GPIO is in Hardware default state. 4Solder bridge and test point are available and so functionality can be maintained by manually connecting the signal to a GPIO of choice even when TRACE is in use. |
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- Name
- The name to be used when referring to this signal path and the configuration needed to control it.
- nRF52 control GPIO
- The GPIOs on nRF52840 that are used to control the analog switches.
- Hardware default
- The default logic level of the control signal if pin is not driven.
- nRF9160 GPIO
- The GPIOs on nRF9160 that can be configured.
- External
- The connector and pin with permanent routing of the nRF9160 GPIO, not affected by the board controller.
- Default
- The default connection for the nRF9160 GPIO if the nRF52 control GPIO pins are not driven (Hardware default logic level).
- Optional
- The optional connection for the nRF9160 GPIO if the nRF52 control GPIO pins are driven to the opposite logic level than the hardware default.
The setup described as Default in the table above is active if all the GPIOs on nRF52840 listed as nRF52 control GPIO are not driven or driven according to the hardware default setting. There are pull resistors on the switch control lines, and therefore, Default can also be received if the control lines from the nRF52840 are not driven. If the optional routing is desired, the nRF52840 control GPIO pins must be set as outputs and driven high.
The nRF52840 SoC is preprogrammed with firmware that provides a control setting. This might not be the same as the hardware default. Configurable code examples for the nRF52840 SoC allowing to change the board routing can be found in the nRF Connect SDK. After the changes are done, the new program must be compiled and programmed to the nRF52840. See the nRF Connect SDK documentation on nRF9160 board controller for information on changing the configuration.
Since this firmware in the nRF52840 SoC decides the nRF9160 DK behavior, it is vital that it is always present in the nRF52840 SoC. If it is accidentally erased or firmware affecting the use of the key nRF52840 GPIOs is programmed in, nRF9160 DK functionality is not guaranteed. In such cases, nRF52840 needs to be preprogrammed with the default board control firmware from the nRF Connect SDK.