Memory resource requirements

This section describes the memory resource requirements for an enabled and disabled S113 SoftDevice.

Flash

The combined flash usage of the SoftDevice and the MBR can be found in the SoftDevice properties section of the release notes. This value corresponds to APP_CODE_BASE in Memory resource map. The combined flash usage of the SoftDevice and the MBR can also be calculated by adding the MBR flash usage, which is 4 kB1, to the SD_FLASH_SIZE defined in nrf_sdm.h.

RAM

Table 1. S113 Memory resource requirements for RAM
RAM S113 Enabled S113 Disabled
SoftDevice RAM consumption Minimum required RAM 2 + Configurable Resources 8 bytes
APP_RAM_BASE address (minimum required value) 0x20000000 + SoftDevice RAM consumption 0x20000008

Call stack

By default, the nRF52 System on Chip (SoC) will have a shared call stack with both application stack frames and SoftDevice stack frames, managed by the Main Stack Pointer (MSP).

The application configures the call stack, and the MSP gets initialized on reset to the address specified by the application vector table entry 0. In its reset vector the application may configure the CPU to use the Process Stack Pointer (PSP) in thread mode. This configuration is optional but may be required by an OS, for example, to isolate application threads and OS context memory. The application programmer must be aware that the SoftDevice will use the MSP as it is always executed in exception mode.

Note: It is customary, but not required, to let the stack run downwards from the upper limit of the RAM Region.

With each major release of an S113 SoftDevice, its maximum (worst case) call stack requirement may be updated. The SoftDevice uses the call stack when SoftDevice interrupt handlers execute. These are asynchronous to the application, so the application programmer must reserve call stack for the application in addition to the call stack requirement by the SoftDevice.

The application must reserve sufficient space to satisfy both the application and the SoftDevice stack memory requirements. The nRF52 SoC has no designated hardware for detecting stack overflow. The application can use the Memory Watch Unit (MWU) peripheral to implement a mechanism for stack overflow detection if the MWU is available on the SoC. For available peripherals, see the relevant product specification in Additional documentation.

The SoftDevice does not use the ARM® Cortex®-M4 Floating-Point Unit (FPU) and does not configure any floating-point registers. S113 Memory resource requirements for call stack depicts the maximum call stack size that may be consumed by the SoftDevice when not using the FPU.

Note: The FPU is not available on some nRF52 SoCs. See the relevant product specification in Additional documentation.

The SoftDevice uses multiple interrupt levels, as described in detail in Interrupt model and processor availability. If FPU is used by the application, the processor will need to reserve memory in the stack frame for stacking the FPU registers for each interrupt level used by the SoftDevice. This must be accounted for when configuring the total call stack size. For more information on how the use of multiple interrupt levels impacts the stack size when using the FPU, see Application Note 298 from ARM regarding the ARM Cortex-M4 processor with FPU.

Table 2. S113 Memory resource requirements for call stack
Call stack S113 Enabled S113 Disabled
Maximum usage with FPU disabled 1536 bytes (0x600) 0 bytes

Heap

There is no heap required by nRF52 SoftDevices. The application is free to allocate and use a heap without disrupting the SoftDevice functionality.

1 1 kB = 1024 bytes
2 For the minimum RAM required by the SoftDevice, see the SoftDevice properties section of the release notes.