nRF5 SDK v17.0.2
Data Fields
nrfx_spim_config_t Struct Reference

Configuration structure of the SPIM driver instance. More...

#include <nrfx_spim.h>

Data Fields

uint8_t sck_pin
 SCK pin number.
 
uint8_t mosi_pin
 MOSI pin number (optional). More...
 
uint8_t miso_pin
 MISO pin number (optional). More...
 
uint8_t ss_pin
 Slave Select pin number (optional). More...
 
bool ss_active_high
 Polarity of the Slave Select pin during transmission.
 
uint8_t irq_priority
 Interrupt priority.
 
uint8_t orc
 Overrun character. More...
 
nrf_spim_frequency_t frequency
 SPIM frequency.
 
nrf_spim_mode_t mode
 SPIM mode.
 
nrf_spim_bit_order_t bit_order
 SPIM bit order.
 
uint8_t dcx_pin
 D/CX pin number (optional).
 
uint8_t rx_delay
 Sample delay for input serial data on MISO. More...
 
bool use_hw_ss
 Indication to use software or hardware controlled Slave Select pin.
 
uint8_t ss_duration
 Slave Select duration before and after transmission. More...
 

Detailed Description

Configuration structure of the SPIM driver instance.

Field Documentation

uint8_t nrfx_spim_config_t::miso_pin

MISO pin number (optional).

Set to NRFX_SPIM_PIN_NOT_USED if this signal is not needed.

uint8_t nrfx_spim_config_t::mosi_pin

MOSI pin number (optional).

Set to NRFX_SPIM_PIN_NOT_USED if this signal is not needed.

uint8_t nrfx_spim_config_t::orc

Overrun character.

This character is used when all bytes from the TX buffer are sent, but the transfer continues due to RX.

uint8_t nrfx_spim_config_t::rx_delay

Sample delay for input serial data on MISO.

The value specifies the delay, in number of 64 MHz clock cycles (15.625 ns), from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled.

uint8_t nrfx_spim_config_t::ss_duration

Slave Select duration before and after transmission.

Minimum duration between the edge of CSN and the edge of SCK and minimum duration of CSN must stay inactive between transactions. The value is specified in number of 64 MHz clock cycles (15.625 ns). Supported only for hardware-controlled Slave Select.

uint8_t nrfx_spim_config_t::ss_pin

Slave Select pin number (optional).

Set to NRFX_SPIM_PIN_NOT_USED if this signal is not needed.


The documentation for this struct was generated from the following file:

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