About this document

This document is organized into chapters that are based on the modules and peripherals available in the IC.

Document status

The document status reflects the level of maturity of the document.

Table 1. Defined document names
Document name Description
Objective Product Specification (OPS)

Applies to document versions up to 1.0.

This document contains target specifications for product development.

Product Specification (PS)

Applies to document versions 1.0 and higher.

This document contains final product specifications. Nordic Semiconductor ASA reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

Peripheral chapters

Every peripheral has a unique capitalized name or an abbreviation of its name, e.g. TIMER, used for identification and reference. This name is used in chapter headings and references, and it will appear in the ARM® Cortex® Microcontroller Software Interface Standard (CMSIS) hardware abstraction layer to identify the peripheral.

The peripheral instance name, which is different from the peripheral name, is constructed using the peripheral name followed by a numbered postfix, starting with 0, for example, TIMER0. A postfix is normally only used if a peripheral can be instantiated more than once. The peripheral instance name is also used in the CMSIS to identify the peripheral instance.

The chapters describing peripherals may include the following information:

  • A detailed functional description of the peripheral
  • Register configuration for the peripheral
  • Electrical specification tables, containing performance data which apply for the operating conditions described in Peripheral chapters.

Register tables

Individual registers are described using register tables. These tables are built up of two sections. The first three colored rows describe the position and size of the different fields in the register. The following rows describe the fields in more detail.

Fields and values

The Id (Field Id) row specifies the bits that belong to the different fields in the register. If a field has enumerated values, then every value will be identified with a unique value id in the Value Id column.

A blank space means that the field is reserved and read as undefined, and it also must be written as 0 to secure forward compatibility. If a register is divided into more than one field, a unique field name is specified for each field in the Field column. The Value Id may be omitted in the single-bit bit fields when values can be substituted with a Boolean type enumerator range, e.g. true/false, disable(d)/enable(d), on/off, and so on.

Values are usually provided as decimal or hexadecimal. Hexadecimal values have a 0x prefix, decimal values have no prefix.

The Value column can be populated in the following ways:

  • Individual enumerated values, for example 1, 3, 9.
  • Range of values, e.g. [0..4], indicating all values from and including 0 and 4.
  • Implicit values. If no values are indicated in the Value column, all bit combinations are supported, or alternatively the field's translation and limitations are described in the text instead.

If two or more fields are closely related, the Value Id, Value, and Description may be omitted for all but the first field. Subsequent fields will indicate inheritance with '..'.

A feature marked Deprecated should not be used for new designs.

Permissions

Different fields in a register might have different access permissions enforced by hardware.

The access permission for each register field is documented in the Access column in the following ways:

Table 2. Register field permission schemes
Access Description Hardware behavior
RO Read-only Field can only be read. A write will be ignored.
WO Write-only Field can only be written. A read will return an undefined value.
RW Read-write Field can be read and written multiple times.
W1 Write-once Field can only be written once per reset. Any subsequent write will be ignored. A read will return an undefined value.
RW1 Read-write-once Field can be read multiple times, but only written once per reset. Any subsequent write will be ignored.

Registers

Table 3. Register overview
Register Offset Security Description
DUMMY 0x514  

Example of a register controlling a dummy feature

 

DUMMY

Address offset: 0x514

Example of a register controlling a dummy feature

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID     D D D D           C C C               B             A A
Reset 0x00050002 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
ID Access Field Value ID Value Description
A RW

FIELD_A

   

Example of a read-write field with several enumerated values

     

Disabled

0

The example feature is disabled

     

NormalMode

1

The example feature is enabled in normal mode

     

ExtendedMode

2

The example feature is enabled along with extra functionality

B RW

FIELD_B

   

Example of a deprecated read-write field

Deprecated

     

Disabled

0

The override feature is disabled

     

Enabled

1

The override feature is enabled

C RW

FIELD_C

   

Example of a read-write field with a valid range of values

     

ValidRange

[2..7]

Example of allowed values for this field

D RW

FIELD_D

   

Example of a read-write field with no restriction on the values