USBREG — USB regulator control

The USB peripheral has its own voltage regulator. When using the USB peripheral, a 5 V USB supply needs to be provided on the VBUS pin.

The USB peripheral has a dedicated internal voltage regulator for converting the VBUS supply to 3.3 V to be used by the USB signalling interface (D+ and D- lines, and pull-up on D+). The rest of the USB peripheral (USBD) is supplied through the main supply like other on-chip features. As a consequence, both VBUS and combinations of VDDH and VDD are required for USB peripheral operation. For details on configuring the main supplies, see Power supply modes and regulators.

When VBUS rises into its valid range, the software is notified through the USBDETECTED event. The USBREMOVED event is sent when VBUS goes below its valid range. Use these events to implement the USBD startup sequence described in USBD power-up sequence.

When VBUS rises into its valid range while the device is in System OFF, the device resets and transitions to System ON mode. The RESETREAS register will have the VBUS bit set to indicate the source of the wakeup.

See VBUS detection specifications for the voltage level where events are sent (VBUS,DETECT and VBUS,REMOVE) or where the system causes a wakeup from System OFF (VBUS,DETECT).

When the USBD peripheral is enabled through the ENABLE register and VBUS is detected, the regulator is turned on. A USBPWRRDY event is sent when the regulator's worst case settling time has elapsed, indicating to the software that it can enable the USB pull-up to signal a USB connection to the host.

The software can read the state of the VBUS detection and regulator output readiness at any time through the USBREGSTATUS register.

Figure 1. USB voltage regulator
USB voltage regulator

To ensure stability, the input and output of the USB regulator need to be decoupled with a suitable decoupling capacitor CVBUS. See Reference circuitry for the recommended values.

Registers

Table 1. Instances
Base address Domain Peripheral Instance Secure mapping DMA security Description Configuration

0x50037000
0x40037000

APPLICATION USBREG

USBREGULATOR : S
USBREGULATOR : NS

US

NA

USB regulator control

   
Table 2. Register overview
Register Offset Security Description
EVENTS_USBDETECTED 0x100  

Voltage supply detected on VBUS

 
EVENTS_USBREMOVED 0x104  

Voltage supply removed from VBUS

 
EVENTS_USBPWRRDY 0x108  

USB 3.3 V supply ready

 
PUBLISH_USBDETECTED 0x180  

Publish configuration for event USBDETECTED

 
PUBLISH_USBREMOVED 0x184  

Publish configuration for event USBREMOVED

 
PUBLISH_USBPWRRDY 0x188  

Publish configuration for event USBPWRRDY

 
INTEN 0x300  

Enable or disable interrupt

 
INTENSET 0x304  

Enable interrupt

 
INTENCLR 0x308  

Disable interrupt

 
USBREGSTATUS 0x400  

USB supply status

 

EVENTS_USBDETECTED

Address offset: 0x100

Voltage supply detected on VBUS

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                              

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_USBDETECTED

   

Voltage supply detected on VBUS

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

EVENTS_USBREMOVED

Address offset: 0x104

Voltage supply removed from VBUS

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                              

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_USBREMOVED

   

Voltage supply removed from VBUS

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

EVENTS_USBPWRRDY

Address offset: 0x108

USB 3.3 V supply ready

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                              

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

EVENTS_USBPWRRDY

   

USB 3.3 V supply ready

     

NotGenerated

0

Event not generated

     

Generated

1

Event generated

PUBLISH_USBDETECTED

Address offset: 0x180

Publish configuration for event USBDETECTED

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

 

[255..0]

DPPI channel that event USBDETECTED will publish to.

B RW

EN

     

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

PUBLISH_USBREMOVED

Address offset: 0x184

Publish configuration for event USBREMOVED

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

 

[255..0]

DPPI channel that event USBREMOVED will publish to.

B RW

EN

     

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

PUBLISH_USBPWRRDY

Address offset: 0x188

Publish configuration for event USBPWRRDY

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B                                               A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

CHIDX

 

[255..0]

DPPI channel that event USBPWRRDY will publish to.

B RW

EN

     

     

Disabled

0

Disable publishing

     

Enabled

1

Enable publishing

INTEN

Address offset: 0x300

Enable or disable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                          

C

B

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

USBDETECTED

   

Enable or disable interrupt for event USBDETECTED

     

Disabled

0

Disable

     

Enabled

1

Enable

B RW

USBREMOVED

   

Enable or disable interrupt for event USBREMOVED

     

Disabled

0

Disable

     

Enabled

1

Enable

C RW

USBPWRRDY

   

Enable or disable interrupt for event USBPWRRDY

     

Disabled

0

Disable

     

Enabled

1

Enable

INTENSET

Address offset: 0x304

Enable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                          

C

B

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

USBDETECTED

   

Write '1' to enable interrupt for event USBDETECTED

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

USBREMOVED

   

Write '1' to enable interrupt for event USBREMOVED

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

USBPWRRDY

   

Write '1' to enable interrupt for event USBPWRRDY

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

INTENCLR

Address offset: 0x308

Disable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                          

C

B

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A RW

USBDETECTED

   

Write '1' to disable interrupt for event USBDETECTED

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

USBREMOVED

   

Write '1' to disable interrupt for event USBREMOVED

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

USBPWRRDY

   

Write '1' to disable interrupt for event USBPWRRDY

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

USBREGSTATUS

Address offset: 0x400

USB supply status

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                                            

B

A

Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

VBUSDETECT

   

VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)

     

NoVbus

0

VBUS voltage below valid threshold

     

VbusPresent

1

VBUS voltage above valid threshold

B R

OUTPUTRDY

   

USB supply output settling time elapsed

     

NotReady

0

USBREG output settling time not elapsed

     

Ready

1

USBREG output settling time elapsed (same information as USBPWRRDY event)

Electrical specification

USB operating conditions

Symbol Description Min. Typ. Max. Units
VBUS

Supply voltage on VBUS pin

4.35 5 5.5 V
VDPDM

Voltage on D+ and D- lines

VSS - 0.3 VUSB33 + 0.3 V

USB regulator specifications

Symbol Description Min. Typ. Max. Units
IUSB,QUIES

USB regulator quiescent current drawn from VBUS (USBD enabled)

170 µA
tUSBPWRRDY

Time from USB enabled to USBPWRRDY event triggered, VBUS supply provided

1 ms
VUSB33

On voltage at the USB regulator output (DECUSB pin)

3.0 3.3 3.6 V
RSOURCE,VBUS

Maximum source resistance on VBUS, including cable, when VDDH is not connected to VBUS

6 Ω
RSOURCE,VBUSVDDH

Maximum source resistance on VBUS, including cable, when VDDH is connected to VBUS

3.8 Ω
CDECUSB

Decoupling capacitor on the DECUSB pin

2.35 4.7 5.5 µF

VBUS detection specifications

Symbol Description Min. Typ. Max. Units
VBUS,DETECT

Voltage at which rising VBUS gets reported by USBDETECTED

3.4 4.0 4.3 V
VBUS,REMOVE

Voltage at which decreasing VBUS gets reported by USBREMOVED

3.0 3.6 3.9 V

This document was last updated on
2023-12-04.
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