Reference circuitry

Documentation for the different package reference circuits, including Altium Designer files, PCB layout files, and PCB production files can be downloaded from www.nordicsemi.com.

The following reference circuits for nPM1100 QFN and WLCSP packages, based on the standard VTERM product, show the schematics and components to support different configurations in a design.

Table 1. PCB application configuration
  Configuration 1 Configuration 2 Configuration 3
Description

Minimal configuration

Fixed 100 mA VBUS limit

Minimal configuration

Fixed 500 mA VBUS limit

Normal configuration

USB port detection
BUCK Not used Not used Configured
Ship mode Not used Not used Configured
Battery NTC Not used Not used Configured
VTERM VTERMSET = LOW VTERMSET = LOW VTERMSET = HIGH
ISET AVSS VSYS AVSS
D- AVSS AVSS USB
D+ NC NC USB
ICHG

4.7 kΩ

1%

 0 Ω

GND

 1.5 kΩ

GND
VOUTB - - 2V1
Parent topic: nPM1100 Product Specification

Configuration 1

Figure 1. WLCSP schematic
configuration 1
Figure 2. QFN schematic
configuration 1
Table 2. Configuration 1 reference circuitry
Designator Value Description Footprint
C1 2.2 µF Capacitor, X5R, 25 V, ±20% 0603
C2 22 µF Capacitor, X5R, 6.3 V, ± 20% 0603
C3 1.0 µF Capacitor, X5R, 10 V, ± 20% 0201
J1 Battery pack Battery pack TP_2x1mm_TH
LD1 L0603R LED, SMD, RED 0603
LD2 L0603G LED, SMD, GREEN 0603
R1 10 kΩ Resistor, 0.05 W, ±1% 0201
R_ICHG 4.7 kΩ Resistor, 0.05 W, ±1% 0201
U1 nPM1100 Li-ion/Li-poly USB battery charger with high efficiency buck regulator WLCSP-25 or QFN

Configuration 2

Figure 3. WLCSP schematic
configuration 2
Figure 4. QFN schematic
configuration 2
Table 3. Configuration 2 reference circuitry
Designator Value Description Footprint
C1 2.2 µF Capacitor, X5R, 25 V, ±20% 0603
C2 22 µF Capacitor, X5R, 6.3 V, ±20% 0603
C3 1.0 µF Capacitor, X5R, 10 V, ±20% 0201
J1 Battery pack Battery pack TP_2x1mm_TH
LD1 L0603R LED, SMD, RED 0603
LD2 L0603G LED, SMD, GREEN 0603
R1 10 kΩ Resistor, 0.05 W, ±1% 0201
U1 nPM1100 Li-ion/Li-poly USB battery charger with a high efficiency buck regulator WLCSP-25 or QFN

Configuration 3

Figure 5. WLCSP schematic
configuration 3
Figure 6. QFN schematic
configuration 3
Table 4. Configuration 3 reference circuitry
Designator Value Description Footprint
C1 2.2 µF Capacitor, X5R, 25 V, ±20% 0603
C2, C3, C4 10 µF Capacitor, X5R, 6.3 V, ±20% 0603
C5 1.0 µF Capacitor, X5R, 10 V, ±20% 0201
J1 Battery pack Battery pack with NTC TP_3x1mm_TH
L1 2.2 µH Inductor ±20% 0806
LD1, LD3 L0603R LED, SMD, RED 0603
LD2 L0603G LED, SMD, GREEN 0603
R3 1 kΩ Resistor, 0.05 W, ±1% 0201
R_ICHG 1.5 kΩ Resistor, 0.05 W, ±1% 0201
U1 nPM1100 Li-ion/Li-poly USB battery charger with a high efficiency buck regulator WLCSP-25 or QFN

PCB guidelines

A well designed PCB is necessary to achieve good performance. A poor layout can lead to loss in performance or functionality.

To ensure functionality, it is essential to follow the schematics and layout references closely.

A PCB with a minimum of two layers, including a ground plane, is recommended for optimal performance.

The DC supply voltage should be decoupled with high performance capacitors as close as possible to the supply pins. See the reference schematic in Configuration 1 for recommended decoupling capacitor values.

Long power supply lines on the PCB should be avoided. All device grounds, VDD connections, and VDD bypass capacitors must be connected as close as possible to the device.

PCB layout example

The PCB layouts are shown here for WLCSP followed by QFN.

For all available reference layouts, see the Reference Layout section on the Downloads tab for nPM1100 on www.nordicsemi.com.

Figure 7. Top silk layer WLCSP
top silk layer
Figure 8. Top layer WLCSP
top layer
Figure 9. Bottom layer WLCSP
bottom layer
Figure 10. Top silk layer QFN
top silk layer
Figure 11. Top layer QFN
top layer
Figure 12. Bottom layer QFN
bottom layer
Note: No components in the bottom layer.