This section describes measurements on power consumption, Universal Integrated Circuit Card (UICC) interface, and RF to verify performance and quality of the
product.
Checking supply voltages
The expected values of the voltage levels on the VDD, VDD_GPIO, and DEC0 pins are shown in the following table.
Controlling GPIO pins with SWD SWD debug interface can be used for controlling GPIO pins if the functionality needs to be verified without firmware control. This section shows examples of testing the functionality of the GPIO pins in the input and output modes.
Power consumption
nRF9160 has two power inputs: VDD for internal parts and VDD_GPIO for GPIO pins. VDD_GPIO consumption should be observed in measurements, because load on any GPIO pin is visible on VDD_GPIO.
UICC interface
nRF9160 supports only the UICC Class C interface with 1.8 V nominal voltage as described in ETSI TS 102 221. The electrical specifications for all UICC signals that should be verified in product design and prototyping phase are defined in ETSI TS 102 221, chapter Electrical specifications of the UICC . ETSI documents can be downloaded from https://www.etsi.org.
Testing RF performance
The RF performance of nRF9160 is designed to meet the 3GPP TS 36.101 specification. RF performance can be tested with a cellular tester that supports RF measurements specified in the 3GPP specification, such as Rohde & Schwartz CMW500 or Anritsu MT8821C.