v1.0

Starting receiving or transmitting (ON)

When starting to receive or transmit, the configuration of the ON phase is applied to the RFFE device.

The syntax of the ON phase is the following:

AT%XMIPIRFFECTRL=<dev_id>,1,n,<act_addr_0>,<act_data_0>,<act_addr_n-1>,<act_data_n-1>,<k>,
<addr_0>,<addr_1>,<data_0_0>,<data_1_0>,<freq_0>,...,<data_0_k-1>,<data_1_k-1>,<freq_k-1>

The ON phase has two controls: activation and dynamic registers.

The following table is an example of what a control table could look like:

Table 1. Example of RF frequency-based control in the ON phase
RF frequency REG_X REG_Y
0 – 800 MHz A B
801 – 1600 MHz C D
1601 – 2200 MHz E F

The following command syntax is an example of starting to receive or transmit with the %XMIPIRFFECTRL AT command. It has three frequency ranges that control two registers each and one activation register write.

AT%XMIPIRFFECTRL=1,1,1,28,56,3,1,2,A,B,800,C,D,1600,E,F,2200

The command parameters and their values are the following:

Table 2. Parameters in starting receiving example
Parameter name Parameter description Value in example Value description
<dev_id> The identification number of the MIPI RF Front-End Control Interface (RFFE) device given when it was introduced using %XMIPIRFFEDEV. 1  
<use_case#> Number of the use case. INIT = 0, ON = 1, OFF = 2, PWR_OFF = 3. All numbers must be given as decimals (hexadecimals not allowed). 1 ON phase
<n> The number of activation register address-data pairs. Valid values are 0, 1, 2. If n =0, act_addr_0/1 and act_data_0/1 must be omitted. 1 Number of frequency agnostic activation registers
<act_addr_x> Optional 8-bit address of the first register whose value is set to e.g. activate device. This is written each time RF starts. 28 Register address to write
<act_data_x> Optional 8-bit data for the register in <act_addr_x>. 56 Value to write into address 28
<k> The number of frequencies in the configuration. Valid values are 0−64. If k = 0, all the following fields must be omitted. 3 Number of rows in frequency table
<addr_0> The 8-bit address of the first register, whose value is changed on the basis of RF frequency. 1 Address of REG_X (the first register to write)
<addr_1> The 8-bit address of the other register, whose value is changed on the basis of RF frequency. If addr_1 == addr_0, then only <data_0_y> is written. 2 Address of REG_Y (the second register to write)
<data_0_0> The 8-bit data for the register in <addr_0>, if frequency is smaller than or equal to <freq_0>. A Value to write to REG_X if RF frequency is 0-800 MHz
<data_1_0> The 8-bit data for the register in <addr_1>, if frequency is smaller than or equal to <freq_y>. B Value to write to REG_Y if RF frequency is 0-800 MHz
<freq_0> The frequency in MHz (integer), to which the current RF frequency is compared. 800 High limit MHz of first frequency row
<data_0_1> The 8-bit data for the register in <addr_0>, if frequency is smaller than or equal to <freq_1>. C Value to write to REG_X if RF frequency is 801-1600 MHz
<data_1_1> The 8-bit data for the register in <addr_1>, if frequency is smaller than or equal to <freq_y>. D Value to write to REG_Y if RF frequency is 801-1600 MHz
<freq_1> The frequency in MHz (integer), to which the current RF frequency is compared. 1600 High limit MHz of second frequency row
<data_0_2> The 8-bit data for the register in <addr_0>, if frequency is smaller than or equal to <freq_2>. E Value to write to REG_X if RF frequency is 1601-2200 MHz
<data_1_2> The 8-bit data for the register in <addr_1>, if frequency is smaller than or equal to <freq_2>. F Value to write to REG_Y if RF frequency is 1601-2200 MHz
<freq_2> The frequency in MHz (integer), to which the current RF frequency is compared. 2200 High limit MHz of third frequency row

There can be up to 64 rows in the frequency table, which can be useful in achieving high-resolution antenna tuning.

The writes in the ON command are applied at least 50 µs before modem transmission or reception. The ON command writes are applied also in the frequency hopping mode that may be used in the Cat-M1 operation mode.