[7] KMU: Subsequent accesses between info_mem and main_mem of the flash may not work properly

Symptoms

Expected CPU read operation to flash main memory area never happens.

Conditions

Two back to back consecutive CPU read operations to flash, where the first read is to the flash UICR info page, and the second read is to flash main memory area.

Consequences

The read operation results in undefined behavior.

Workaround

uint32_t a = UICR_S->SOMEREGISTER;
__DSB();
uint32_t b = *((uint32_t *)SOMEFLASHADDR);