[23] UART: TASKS_RESUME impacts UARTE

This anomaly applies to IC Rev. Revision 1, build codes SICA-B0A.

It was inherited from the previous IC revision Engineering A.

Symptoms

Issuing TASKS_RESUME results in bit(s) being set in the UARTE ERRORSRC register after it is enabled, even when not started.

Conditions

The internal state of a disabled UARTE changes when any of the tasks TASKS_RESUME, TASKS_STARTRX, and TASKS_STARTTX is triggered. These tasks are shared by UARTE, TWIM, TWIS, and SPIM.

Consequences

UARTE will start transmitting immediately after being enabled.

Workaround

Depending on which UARTE instance is affected, apply the following steps before enabling UARTE.
  • If TXENABLE reads '1', trigger TASKS_STOPTX.
  • If RXENABLE reads '1':
    • Enable UARTE.
    • Trigger TASKS_STOPRX.
    • Wait until RXENABLE reads '0'.
    • Clear ERRORSRC register.
The exact address depends on the UARTE instance. See the following table.
Table 1. Register addresses
UARTE Instance RXENABLE TXENABLE
UARTE0:NS 0x40008564 0x40008568
UARTE0:S 0x50008564 0x50008568
UARTE1:NS 0x40009564 0x40009568
UARTE1:S 0x50009564 0x50009568
UARTE2:NS 0x4000A564 0x4000A568
UARTE2:S 0x5000A564 0x5000A568
UARTE3:NS 0x4000B564 0x4000B568
UARTE3:S 0x5000B564 0x5000B568
Parent topic: New and inherited anomalies