This anomaly applies to Revision 1, build codes CLAA-D00, QKAA-D00.
Application
QSPI data is corrupted.
CLOCK.HFCLK192MCTRL.HCLK192M is not set to 0x0, or CLOCK.HFCLKCTRL.HCLK is not set to 0x1 during QSPI transfer. This means that during QSPI transfer, the scalable QSPI clock (PCLK192M) is not set to 192 MHz or the scalable CPU clock (HCLK128M) is not set to 64 MHz.
QSPI transfer and signaling are unreliable.
Use CLOCK.HFCLK192MCTRL.HCLK192M = 0x0 and CLOCK.HFCLKCTRL.HCLK = 0x1 during a QSPI transfer. This means that during QSPI transfer, the scalable QSPI clock (PCLK192M) must be set to 192 MHz and the scalable CPU clock (HCLK128M) must be set to 64 MHz.
To save power, use CLOCK.HFCLK192MCTRL.HCLK192M=0x2 when QSPI is disabled.