This anomaly applies to IC Rev. Engineering A, build codes QIAA-AA0.
Unexpected control endpoint stall during enumeration and/or loss of data.
USB protocol is in "Status stage", and the optional "Data stage" preceding the "Status stage" was included. USBD is waiting for the STATUS task to be triggered from software to allow ACK to be sent to Host.
USBD sends ACK to Host during "Status stage", regardless of whether the STATUS task has been triggered. New data may be received by USBD before old data has been processed. Stalling may occur if STATUS task is triggered too late, for example, during the next SETUP transaction.
For OUT transfers: Do not use the STATUS task if the SETUP transaction contains data. For IN transfers: Trigger STATUS task using the PPI or SHORT register. There is no possibility to properly STALL any SETUP transfer that consists of data based on the analyzed data.