20 |
RTC |
Register values are invalid
|
X |
36 |
CLOCK |
Some registers are not reset when expected
|
X |
66 |
TEMP |
Linearity specification not met with default settings
|
X |
78 |
TIMER |
High current consumption when using timer STOP task only
|
X |
136 |
System |
Bits in RESETREAS are set when they should not be
|
X |
173 |
GPIO |
Writes to LATCH register take several CPU cycles to take effect
|
X |
176 |
System |
Flash erase through CTRL-AP fails due to watchdog time-out
|
X |
184 |
NVMC |
Erase or write operations from the external debugger fail when CPU is not halted
|
X |
187 |
USBD |
USB cannot be enabled
|
X |
210 |
GPIO |
Bits in GPIO LATCH register are incorrectly set to 1
|
X |
219 |
TWIM |
I2C timing spec is violated at 400 kHz
|
X |
223 |
USBD |
Unexpected behavior after reset
|
X |
225 |
RADIO |
RSSI parameter adjustment
|
X |
228 |
RADIO |
No interrupt is generated for SYNC event
|
X |
233 |
NVMC |
NVMC READYNEXT not generated
|
X |
243 |
RADIO |
T_IFS is inaccurate with Bluetooth Long Range
|
X |
245 |
RADIO |
CRC is wrong when data whitening is enabled and address field is included in CRC calculation
|
X |
246 |
System |
Intermittent extra current consumption when going to sleep
|
X |
248 |
RADIO |
Reading DTX in MODECNF0 gives incorrect value
|
X |
251 |
NVMC |
NVMC ERASEALL is blocked when access port protection is enabled
|
X |
258 |
RADIO |
PHYEND event is delayed for some AoA and AoD configurations
|
X |
263 |
CCM |
On-the-fly decryption fails for direction finding packets
|
X |
265 |
UICR |
Pin mapping is not functional in PSELRESET
|
X |