Macros | |
#define | NRFX_PWM_ENABLED |
Set to 1 to activate. More... | |
#define | NRFX_PWM0_ENABLED |
Enable PWM0 instance. More... | |
#define | NRFX_PWM1_ENABLED |
Enable PWM1 instance. More... | |
#define | NRFX_PWM2_ENABLED |
Enable PWM2 instance. More... | |
#define | NRFX_PWM3_ENABLED |
Enable PWM3 instance. More... | |
#define | NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY |
Interrupt priority. More... | |
#define | NRFX_PWM_CONFIG_LOG_ENABLED |
Enables logging in the module. More... | |
#define | NRFX_PWM_CONFIG_LOG_LEVEL |
Default Severity level. More... | |
#define | NRFX_PWM_CONFIG_INFO_COLOR |
ANSI escape code prefix. More... | |
#define | NRFX_PWM_CONFIG_DEBUG_COLOR |
ANSI escape code prefix. More... | |
#define | NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED |
Enables nRF52 Anomaly 109 workaround for PWM. More... | |
#define | NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE |
EGU instance used by the nRF52 Anomaly 109 workaround for PWM. More... | |
#define NRFX_PWM0_ENABLED |
Enable PWM0 instance.
Set to 1 to activate.
#define NRFX_PWM1_ENABLED |
Enable PWM1 instance.
Set to 1 to activate.
#define NRFX_PWM2_ENABLED |
Enable PWM2 instance.
Set to 1 to activate.
#define NRFX_PWM3_ENABLED |
Enable PWM3 instance.
Set to 1 to activate.
#define NRFX_PWM_CONFIG_DEBUG_COLOR |
ANSI escape code prefix.
Following options are available:
#define NRFX_PWM_CONFIG_INFO_COLOR |
ANSI escape code prefix.
Following options are available:
#define NRFX_PWM_CONFIG_LOG_ENABLED |
Enables logging in the module.
Set to 1 to activate.
#define NRFX_PWM_CONFIG_LOG_LEVEL |
Default Severity level.
Following options are available:
#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY |
Interrupt priority.
Following options are available:
#define NRFX_PWM_ENABLED |
Set to 1 to activate.
#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE |
EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
Following options are available:
#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED |
Enables nRF52 Anomaly 109 workaround for PWM.
The workaround uses interrupts to wake up the CPU and ensure it is active when PWM is about to start a DMA transfer. For initial transfer, done when a playback is started via PPI, a specific EGU instance is used to generate the interrupt. During the playback, the PWM interrupt triggered on SEQEND event of a preceding sequence is used to protect the transfer done for the next sequence to be played.
Set to 1 to activate.