Hardware access layer for managing the System Protection Unit (SPU) peripheral. More...

Enumerations
enum	nrf_spu_event_t { NRF_SPU_EVENT_RAMACCERR = offsetof(NRF_SPU_Type, EVENTS_RAMACCERR), NRF_SPU_EVENT_FLASHACCERR = offsetof(NRF_SPU_Type, EVENTS_FLASHACCERR), NRF_SPU_EVENT_PERIPHACCERR = offsetof(NRF_SPU_Type, EVENTS_PERIPHACCERR) }
	SPU events. More...

enum	nrf_spu_int_mask_t { NRF_SPU_INT_RAMACCERR_MASK = SPU_INTENSET_RAMACCERR_Msk, NRF_SPU_INT_FLASHACCERR_MASK = SPU_INTENSET_FLASHACCERR_Msk, NRF_SPU_INT_PERIPHACCERR_MASK = SPU_INTENSET_PERIPHACCERR_Msk }
	SPU interrupts. More...

enum	nrf_spu_nsc_size_t { NRF_SPU_NSC_SIZE_DISABLED = 0, NRF_SPU_NSC_SIZE_32B = 1, NRF_SPU_NSC_SIZE_64B = 2, NRF_SPU_NSC_SIZE_128B = 3, NRF_SPU_NSC_SIZE_256B = 4, NRF_SPU_NSC_SIZE_512B = 5, NRF_SPU_NSC_SIZE_1024B = 6, NRF_SPU_NSC_SIZE_2048B = 7, NRF_SPU_NSC_SIZE_4096B = 8 }
	SPU Non-Secure Callable (NSC) region size. More...

enum	nrf_spu_mem_perm_t { NRF_SPU_MEM_PERM_EXECUTE = SPU_FLASHREGION_PERM_EXECUTE_Msk, NRF_SPU_MEM_PERM_WRITE = SPU_FLASHREGION_PERM_WRITE_Msk, NRF_SPU_MEM_PERM_READ = SPU_FLASHREGION_PERM_READ_Msk }
	SPU memory region permissions. More...

Functions
NRF_STATIC_INLINE void	nrf_spu_event_clear (NRF_SPU_Type *p_reg, nrf_spu_event_t event)
	Function for clearing a specific SPU event. More...

NRF_STATIC_INLINE bool	nrf_spu_event_check (NRF_SPU_Type const *p_reg, nrf_spu_event_t event)
	Function for retrieving the state of the SPU event. More...

NRF_STATIC_INLINE void	nrf_spu_int_enable (NRF_SPU_Type *p_reg, uint32_t mask)
	Function for enabling specified interrupts. More...

NRF_STATIC_INLINE void	nrf_spu_int_disable (NRF_SPU_Type *p_reg, uint32_t mask)
	Function for disabling specified interrupts. More...

NRF_STATIC_INLINE uint32_t	nrf_spu_int_enable_check (NRF_SPU_Type const *p_reg, uint32_t mask)
	Function for checking if the specified interrupts are enabled. More...

NRF_STATIC_INLINE void	nrf_spu_publish_set (NRF_SPU_Type *p_reg, nrf_spu_event_t event, uint32_t channel)
	Function for setting up publication configuration of a given SPU event. More...

NRF_STATIC_INLINE void	nrf_spu_publish_clear (NRF_SPU_Type *p_reg, nrf_spu_event_t event)
	Function for clearing publication configuration of a given SPU event. More...

NRF_STATIC_INLINE bool	nrf_spu_tz_is_available (NRF_SPU_Type const *p_reg)
	Function for retrieving the capabilities of the current device. More...

NRF_STATIC_INLINE void	nrf_spu_dppi_config_set (NRF_SPU_Type *p_reg, uint8_t dppi_id, uint32_t channels_mask, bool lock_conf)
	Function for configuring the DPPI channels to be available in particular domains. More...

NRF_STATIC_INLINE void	nrf_spu_gpio_config_set (NRF_SPU_Type *p_reg, uint8_t gpio_port, uint32_t gpio_mask, bool lock_conf)
	Function for configuring the GPIO pins to be available in particular domains. More...

NRF_STATIC_INLINE void	nrf_spu_flashnsc_set (NRF_SPU_Type *p_reg, uint8_t flash_nsc_id, nrf_spu_nsc_size_t flash_nsc_size, uint8_t region_number, bool lock_conf)
	Function for configuring non-secure callable flash region. More...

NRF_STATIC_INLINE void	nrf_spu_ramnsc_set (NRF_SPU_Type *p_reg, uint8_t ram_nsc_id, nrf_spu_nsc_size_t ram_nsc_size, uint8_t region_number, bool lock_conf)
	Function for configuring non-secure callable RAM region. More...

NRF_STATIC_INLINE void	nrf_spu_flashregion_set (NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)
	Function for configuring security for a particular flash region. More...

NRF_STATIC_INLINE void	nrf_spu_ramregion_set (NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)
	Function for configuring security for the RAM region. More...

NRF_STATIC_INLINE void	nrf_spu_peripheral_set (NRF_SPU_Type *p_reg, uint32_t peripheral_id, bool secure_attr, bool secure_dma, bool lock_conf)
	Function for configuring access permissions of the peripheral. More...

NRF_STATIC_INLINE void	nrf_spu_extdomain_set (NRF_SPU_Type *p_reg, uint32_t domain_id, bool secure_attr, bool lock_conf)
	Function for configuring bus access permissions of the specified external domain. More...

Detailed Description

Hardware access layer for managing the System Protection Unit (SPU) peripheral.

Enumeration Type Documentation

◆ nrf_spu_event_t

enum nrf_spu_event_t

SPU events.

Enumerator
NRF_SPU_EVENT_RAMACCERR	A security violation has been detected for the RAM memory space.
NRF_SPU_EVENT_FLASHACCERR	A security violation has been detected for the Flash memory space.
NRF_SPU_EVENT_PERIPHACCERR	A security violation has been detected on one or several peripherals.

◆ nrf_spu_int_mask_t

enum nrf_spu_int_mask_t

SPU interrupts.

Enumerator
NRF_SPU_INT_RAMACCERR_MASK	Interrupt on RAMACCERR event.
NRF_SPU_INT_FLASHACCERR_MASK	Interrupt on FLASHACCERR event.
NRF_SPU_INT_PERIPHACCERR_MASK	Interrupt on PERIPHACCERR event.

◆ nrf_spu_mem_perm_t

enum nrf_spu_mem_perm_t

SPU memory region permissions.

Enumerator
NRF_SPU_MEM_PERM_EXECUTE	Allow code execution from particular memory region.
NRF_SPU_MEM_PERM_WRITE	Allow write operation on particular memory region.
NRF_SPU_MEM_PERM_READ	Allow read operation from particular memory region.

◆ nrf_spu_nsc_size_t

enum nrf_spu_nsc_size_t

SPU Non-Secure Callable (NSC) region size.

Enumerator
NRF_SPU_NSC_SIZE_DISABLED	Not defined as a non-secure callable region.
NRF_SPU_NSC_SIZE_32B	Non-Secure Callable region with a 32-byte size.
NRF_SPU_NSC_SIZE_64B	Non-Secure Callable region with a 64-byte size.
NRF_SPU_NSC_SIZE_128B	Non-Secure Callable region with a 128-byte size.
NRF_SPU_NSC_SIZE_256B	Non-Secure Callable region with a 256-byte size.
NRF_SPU_NSC_SIZE_512B	Non-Secure Callable region with a 512-byte size.
NRF_SPU_NSC_SIZE_1024B	Non-Secure Callable region with a 1024-byte size.
NRF_SPU_NSC_SIZE_2048B	Non-Secure Callable region with a 2048-byte size.
NRF_SPU_NSC_SIZE_4096B	Non-Secure Callable region with a 4096-byte size.

Function Documentation

◆ nrf_spu_dppi_config_set()

NRF_STATIC_INLINE void nrf_spu_dppi_config_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	dppi_id,
		uint32_t	channels_mask,
		bool	lock_conf
	)

Function for configuring the DPPI channels to be available in particular domains.

Channels are configured as bitmask. Set one in bitmask to make channels available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	dppi_id	DPPI peripheral id.
[in]	channels_mask	Bitmask with channels configuration.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_event_check()

NRF_STATIC_INLINE bool nrf_spu_event_check	(	NRF_SPU_Type const *	p_reg,
		nrf_spu_event_t	event
	)

Function for retrieving the state of the SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to be checked.

Return values

true	The event has been generated.
false	The event has not been generated.

◆ nrf_spu_event_clear()

NRF_STATIC_INLINE void nrf_spu_event_clear	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event
	)

Function for clearing a specific SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to clear.

◆ nrf_spu_extdomain_set()

NRF_STATIC_INLINE void nrf_spu_extdomain_set	(	NRF_SPU_Type *	p_reg,
		uint32_t	domain_id,
		bool	secure_attr,
		bool	lock_conf
	)

Function for configuring bus access permissions of the specified external domain.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	domain_id	ID number of a particular external domain.
[in]	secure_attr	Specifies if the bus accesses from this domain have the secure attribute set.
[in]	lock_conf	Specifies if the configuration should be locked until next SoC reset.

◆ nrf_spu_flashnsc_set()

NRF_STATIC_INLINE void nrf_spu_flashnsc_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	flash_nsc_id,
		nrf_spu_nsc_size_t	flash_nsc_size,
		uint8_t	region_number,
		bool	lock_conf
	)

Function for configuring non-secure callable flash region.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	flash_nsc_id	Non-secure callable flash region ID.
[in]	flash_nsc_size	Non-secure callable flash region size.
[in]	region_number	Flash region number.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_flashregion_set()

NRF_STATIC_INLINE void nrf_spu_flashregion_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	region_id,
		bool	secure_attr,
		uint32_t	permissions,
		bool	lock_conf
	)

Function for configuring security for a particular flash region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	region_id	Flash region index.
[in]	secure_attr	Set region attribute to secure.
[in]	permissions	Flash region permissions.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_gpio_config_set()

NRF_STATIC_INLINE void nrf_spu_gpio_config_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	gpio_port,
		uint32_t	gpio_mask,
		bool	lock_conf
	)

Function for configuring the GPIO pins to be available in particular domains.

GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	gpio_port	Port number.
[in]	gpio_mask	Bitmask with gpio configuration.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_int_disable()

NRF_STATIC_INLINE void nrf_spu_int_disable	(	NRF_SPU_Type *	p_reg,
		uint32_t	mask
	)

Function for disabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Interrupts to be disabled.

◆ nrf_spu_int_enable()

NRF_STATIC_INLINE void nrf_spu_int_enable	(	NRF_SPU_Type *	p_reg,
		uint32_t	mask
	)

Function for enabling specified interrupts.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Interrupts to be enabled.

◆ nrf_spu_int_enable_check()

NRF_STATIC_INLINE uint32_t nrf_spu_int_enable_check	(	NRF_SPU_Type const *	p_reg,
		uint32_t	mask
	)

Function for checking if the specified interrupts are enabled.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	mask	Mask of interrupts to be checked.

Returns: Mask of enabled interrupts.

◆ nrf_spu_peripheral_set()

NRF_STATIC_INLINE void nrf_spu_peripheral_set	(	NRF_SPU_Type *	p_reg,
		uint32_t	peripheral_id,
		bool	secure_attr,
		bool	secure_dma,
		bool	lock_conf
	)

Function for configuring access permissions of the peripheral.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	peripheral_id	ID number of a particular peripheral.
[in]	secure_attr	Peripheral registers accessible only from secure domain.
[in]	secure_dma	DMA transfers possible only from RAM memory in secure domain.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_publish_clear()

NRF_STATIC_INLINE void nrf_spu_publish_clear	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event
	)

Function for clearing publication configuration of a given SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to clear.

◆ nrf_spu_publish_set()

NRF_STATIC_INLINE void nrf_spu_publish_set	(	NRF_SPU_Type *	p_reg,
		nrf_spu_event_t	event,
		uint32_t	channel
	)

Function for setting up publication configuration of a given SPU event.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	event	Event to configure.
[in]	channel	Channel to connect with published event.

◆ nrf_spu_ramnsc_set()

NRF_STATIC_INLINE void nrf_spu_ramnsc_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	ram_nsc_id,
		nrf_spu_nsc_size_t	ram_nsc_size,
		uint8_t	region_number,
		bool	lock_conf
	)

Function for configuring non-secure callable RAM region.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	ram_nsc_id	Non-secure callable RAM region ID.
[in]	ram_nsc_size	Non-secure callable RAM region size.
[in]	region_number	RAM region number.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_ramregion_set()

NRF_STATIC_INLINE void nrf_spu_ramregion_set	(	NRF_SPU_Type *	p_reg,
		uint8_t	region_id,
		bool	secure_attr,
		uint32_t	permissions,
		bool	lock_conf
	)

Function for configuring security for the RAM region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

[in]	p_reg	Pointer to the structure of registers of the peripheral.
[in]	region_id	RAM region index.
[in]	secure_attr	Set region attribute to secure.
[in]	permissions	RAM region permissions.
[in]	lock_conf	Lock configuration until next SoC reset.

◆ nrf_spu_tz_is_available()

NRF_STATIC_INLINE bool nrf_spu_tz_is_available ( NRF_SPU_Type const * p_reg )

Function for retrieving the capabilities of the current device.

Parameters

[in] p_reg Pointer to the structure of registers of the peripheral.

Return values

true	ARM TrustZone support is available.
false	ARM TrustZone support is not available.

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ nrf_spu_event_t

◆ nrf_spu_int_mask_t

◆ nrf_spu_mem_perm_t

◆ nrf_spu_nsc_size_t

Function Documentation

◆ nrf_spu_dppi_config_set()

◆ nrf_spu_event_check()

◆ nrf_spu_event_clear()

◆ nrf_spu_extdomain_set()

◆ nrf_spu_flashnsc_set()

◆ nrf_spu_flashregion_set()

◆ nrf_spu_gpio_config_set()

◆ nrf_spu_int_disable()

◆ nrf_spu_int_enable()

◆ nrf_spu_int_enable_check()

◆ nrf_spu_peripheral_set()

◆ nrf_spu_publish_clear()

◆ nrf_spu_publish_set()

◆ nrf_spu_ramnsc_set()

◆ nrf_spu_ramregion_set()

◆ nrf_spu_tz_is_available()