Macros | |
#define | PWM_ENABLED |
Set to 1 to activate. More... | |
#define | PWM_DEFAULT_CONFIG_OUT0_PIN |
Out0 pin. More... | |
#define | PWM_DEFAULT_CONFIG_OUT1_PIN |
Out1 pin. More... | |
#define | PWM_DEFAULT_CONFIG_OUT2_PIN |
Out2 pin. More... | |
#define | PWM_DEFAULT_CONFIG_OUT3_PIN |
Out3 pin. More... | |
#define | PWM_DEFAULT_CONFIG_BASE_CLOCK |
Base clock. More... | |
#define | PWM_DEFAULT_CONFIG_COUNT_MODE |
Count mode. More... | |
#define | PWM_DEFAULT_CONFIG_TOP_VALUE |
Top value. More... | |
#define | PWM_DEFAULT_CONFIG_LOAD_MODE |
Load mode. More... | |
#define | PWM_DEFAULT_CONFIG_STEP_MODE |
Step mode. More... | |
#define | PWM_DEFAULT_CONFIG_IRQ_PRIORITY |
Interrupt priority. More... | |
#define | PWM0_ENABLED |
Enable PWM0 instance. More... | |
#define | PWM1_ENABLED |
Enable PWM1 instance. More... | |
#define | PWM2_ENABLED |
Enable PWM2 instance. More... | |
#define | PWM3_ENABLED |
Enable PWM3 instance. More... | |
#define | PWM_CONFIG_LOG_ENABLED |
Enables logging in the module. More... | |
#define | PWM_CONFIG_LOG_LEVEL |
Default Severity level. More... | |
#define | PWM_CONFIG_INFO_COLOR |
ANSI escape code prefix. More... | |
#define | PWM_CONFIG_DEBUG_COLOR |
ANSI escape code prefix. More... | |
#define | PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED |
Enables nRF52 Anomaly 109 workaround for PWM. More... | |
#define | PWM_NRF52_ANOMALY_109_EGU_INSTANCE |
EGU instance used by the nRF52 Anomaly 109 workaround for PWM. More... | |
#define PWM0_ENABLED |
Enable PWM0 instance.
Set to 1 to activate.
#define PWM1_ENABLED |
Enable PWM1 instance.
Set to 1 to activate.
#define PWM2_ENABLED |
Enable PWM2 instance.
Set to 1 to activate.
#define PWM3_ENABLED |
Enable PWM3 instance.
Set to 1 to activate.
#define PWM_CONFIG_DEBUG_COLOR |
ANSI escape code prefix.
Following options are available:
#define PWM_CONFIG_INFO_COLOR |
ANSI escape code prefix.
Following options are available:
#define PWM_CONFIG_LOG_ENABLED |
Enables logging in the module.
Set to 1 to activate.
#define PWM_CONFIG_LOG_LEVEL |
Default Severity level.
Following options are available:
#define PWM_DEFAULT_CONFIG_BASE_CLOCK |
Base clock.
Following options are available:
#define PWM_DEFAULT_CONFIG_COUNT_MODE |
Count mode.
Following options are available:
#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY |
Interrupt priority.
Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice
Following options are available:
#define PWM_DEFAULT_CONFIG_LOAD_MODE |
Load mode.
Following options are available:
#define PWM_DEFAULT_CONFIG_OUT0_PIN |
Out0 pin.
Minimum value: 0 Maximum value: 31
#define PWM_DEFAULT_CONFIG_OUT1_PIN |
Out1 pin.
Minimum value: 0 Maximum value: 31
#define PWM_DEFAULT_CONFIG_OUT2_PIN |
Out2 pin.
Minimum value: 0 Maximum value: 31
#define PWM_DEFAULT_CONFIG_OUT3_PIN |
Out3 pin.
Minimum value: 0 Maximum value: 31
#define PWM_DEFAULT_CONFIG_STEP_MODE |
Step mode.
Following options are available:
#define PWM_DEFAULT_CONFIG_TOP_VALUE |
Top value.
#define PWM_ENABLED |
Set to 1 to activate.
#define PWM_NRF52_ANOMALY_109_EGU_INSTANCE |
EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
Following options are available:
#define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED |
Enables nRF52 Anomaly 109 workaround for PWM.
The workaround uses interrupts to wake up the CPU and ensure it is active when PWM is about to start a DMA transfer. For initial transfer, done when a playback is started via PPI, a specific EGU instance is used to generate the interrupt. During the playback, the PWM interrupt triggered on SEQEND event of a preceding sequence is used to protect the transfer done for the next sequence to be played.
Set to 1 to activate.