MWU — Memory watch unit

The Memory watch unit (MWU) can be used to generate events when a memory region is accessed by the CPU. The MWU can be configured to trigger events for access to Data RAM and Peripheral memory segments. The MWU allows an application developer to generate memory access events during development for debugging or during production execution for failure detection and recovery.

Listed here are the main features for MWU:

Table 1. Memory regions
Memory region START address END address
REGION[0..3] Configurable Configurable
PREGION[0] 0x40000000 0x4001FFFF
PREGION[1] 0x40020000 0x4003FFFF

Each MWU region is defined by a start address and an end address, configured by the START and END registers respectively. These addresses are byte aligned and inclusive. The END register value has to be greater or equal to the START register value. Each region is associated with a pair of events that indicate that either a write access or a read access from the CPU has been detected inside the region.

For regions containing subregions (see below), a set of status registers PERREGION[0..1].SUBSTATWA and PERREGION[0..1].SUBSTATRA indicate which subregion(s) caused the EVENT_PREGION[0..1].WA and EVENT_PREGION[0..1].RA respectively.

The MWU is only able to detect memory accesses in the Data RAM and Peripheral memory segments from the CPU, see Memory for more information about the different memory segments. EasyDMA accesses are not monitored by the MWU. The MWU requires two HCLK cycles to detect and generate the event.

The peripheral regions, PREGION[0...1], are divided into 32 equally sized subregions, SR[0...31]. All subregions are excluded in the main region by default, and any can be included by specifying them in the SUBS register. When a subregion is excluded from the main region, the memory watch mechanism will not trigger any events when that subregion is accessed.

Subregions in PREGION[0..1] cannot be individually configured for read or write access watch. Watch configuration is only possible for a region as a whole. The PRGNiRA and PRGNiWA (i=0..1) fields in the REGIONEN register control watching read and write access.

REGION[0..3] can be individually enabled for read and/or write access watching through their respective RGNiRA and RGNiWA (i=0..3) fields in the REGIONEN register.

REGIONENSET and REGIONENCLR allow respectively enabling and disabling one or multiple REGIONs or PREGIONs watching in a single write access.

Registers

Table 2. Instances
Base address Peripheral Instance Description Configuration
0x40020000 MWU MWU

Memory Watch Unit

   
Table 3. Register Overview
Register Offset Description
EVENTS_REGION[0].WA 0x100

Write access to region 0 detected

 
EVENTS_REGION[0].RA 0x104

Read access to region 0 detected

 
EVENTS_REGION[1].WA 0x108

Write access to region 1 detected

 
EVENTS_REGION[1].RA 0x10C

Read access to region 1 detected

 
EVENTS_REGION[2].WA 0x110

Write access to region 2 detected

 
EVENTS_REGION[2].RA 0x114

Read access to region 2 detected

 
EVENTS_REGION[3].WA 0x118

Write access to region 3 detected

 
EVENTS_REGION[3].RA 0x11C

Read access to region 3 detected

 
EVENTS_PREGION[0].WA 0x160

Write access to peripheral region 0 detected

 
EVENTS_PREGION[0].RA 0x164

Read access to peripheral region 0 detected

 
EVENTS_PREGION[1].WA 0x168

Write access to peripheral region 1 detected

 
EVENTS_PREGION[1].RA 0x16C

Read access to peripheral region 1 detected

 
INTEN 0x300

Enable or disable interrupt

 
INTENSET 0x304

Enable interrupt

 
INTENCLR 0x308

Disable interrupt

 
NMIEN 0x320

Enable or disable non-maskable interrupt

 
NMIENSET 0x324

Enable non-maskable interrupt

 
NMIENCLR 0x328

Disable non-maskable interrupt

 
PERREGION[0].SUBSTATWA 0x400

Source of event/interrupt in region 0, write access detected while corresponding subregion was enabled for watching

 
PERREGION[0].SUBSTATRA 0x404

Source of event/interrupt in region 0, read access detected while corresponding subregion was enabled for watching

 
PERREGION[1].SUBSTATWA 0x408

Source of event/interrupt in region 1, write access detected while corresponding subregion was enabled for watching

 
PERREGION[1].SUBSTATRA 0x40C

Source of event/interrupt in region 1, read access detected while corresponding subregion was enabled for watching

 
REGIONEN 0x510

Enable/disable regions watch

 
REGIONENSET 0x514

Enable regions watch

 
REGIONENCLR 0x518

Disable regions watch

 
REGION[0].START 0x600

Start address for region 0

 
REGION[0].END 0x604

End address of region 0

 
REGION[1].START 0x610

Start address for region 1

 
REGION[1].END 0x614

End address of region 1

 
REGION[2].START 0x620

Start address for region 2

 
REGION[2].END 0x624

End address of region 2

 
REGION[3].START 0x630

Start address for region 3

 
REGION[3].END 0x634

End address of region 3

 
PREGION[0].START 0x6C0

Reserved for future use

 
PREGION[0].END 0x6C4

Reserved for future use

 
PREGION[0].SUBS 0x6C8

Subregions of region 0

 
PREGION[1].START 0x6D0

Reserved for future use

 
PREGION[1].END 0x6D4

Reserved for future use

 
PREGION[1].SUBS 0x6D8

Subregions of region 1

 

INTEN

Address offset: 0x300

Enable or disable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Enable or disable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

B RW

REGION0RA

   

Enable or disable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

C RW

REGION1WA

   

Enable or disable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

D RW

REGION1RA

   

Enable or disable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

E RW

REGION2WA

   

Enable or disable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

F RW

REGION2RA

   

Enable or disable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

G RW

REGION3WA

   

Enable or disable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

H RW

REGION3RA

   

Enable or disable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

I RW

PREGION0WA

   

Enable or disable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

J RW

PREGION0RA

   

Enable or disable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

K RW

PREGION1WA

   

Enable or disable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

L RW

PREGION1RA

   

Enable or disable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

 

INTENSET

Address offset: 0x304

Enable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Write '1' to Enable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

REGION0RA

   

Write '1' to Enable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

REGION1WA

   

Write '1' to Enable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

D RW

REGION1RA

   

Write '1' to Enable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

E RW

REGION2WA

   

Write '1' to Enable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

F RW

REGION2RA

   

Write '1' to Enable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

G RW

REGION3WA

   

Write '1' to Enable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

H RW

REGION3RA

   

Write '1' to Enable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

I RW

PREGION0WA

   

Write '1' to Enable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

J RW

PREGION0RA

   

Write '1' to Enable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

K RW

PREGION1WA

   

Write '1' to Enable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

L RW

PREGION1RA

   

Write '1' to Enable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

 

INTENCLR

Address offset: 0x308

Disable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Write '1' to Disable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

REGION0RA

   

Write '1' to Disable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

REGION1WA

   

Write '1' to Disable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

D RW

REGION1RA

   

Write '1' to Disable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

E RW

REGION2WA

   

Write '1' to Disable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

F RW

REGION2RA

   

Write '1' to Disable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

G RW

REGION3WA

   

Write '1' to Disable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

H RW

REGION3RA

   

Write '1' to Disable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

I RW

PREGION0WA

   

Write '1' to Disable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

J RW

PREGION0RA

   

Write '1' to Disable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

K RW

PREGION1WA

   

Write '1' to Disable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

L RW

PREGION1RA

   

Write '1' to Disable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

 

NMIEN

Address offset: 0x320

Enable or disable non-maskable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Enable or disable non-maskable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

B RW

REGION0RA

   

Enable or disable non-maskable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

C RW

REGION1WA

   

Enable or disable non-maskable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

D RW

REGION1RA

   

Enable or disable non-maskable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

E RW

REGION2WA

   

Enable or disable non-maskable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

F RW

REGION2RA

   

Enable or disable non-maskable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

G RW

REGION3WA

   

Enable or disable non-maskable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

H RW

REGION3RA

   

Enable or disable non-maskable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

I RW

PREGION0WA

   

Enable or disable non-maskable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

J RW

PREGION0RA

   

Enable or disable non-maskable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

K RW

PREGION1WA

   

Enable or disable non-maskable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Disabled

0

Disable

     

Enabled

1

Enable

L RW

PREGION1RA

   

Enable or disable non-maskable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Disabled

0

Disable

     

Enabled

1

Enable

 

NMIENSET

Address offset: 0x324

Enable non-maskable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Write '1' to Enable non-maskable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

REGION0RA

   

Write '1' to Enable non-maskable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

REGION1WA

   

Write '1' to Enable non-maskable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

D RW

REGION1RA

   

Write '1' to Enable non-maskable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

E RW

REGION2WA

   

Write '1' to Enable non-maskable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

F RW

REGION2RA

   

Write '1' to Enable non-maskable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

G RW

REGION3WA

   

Write '1' to Enable non-maskable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

H RW

REGION3RA

   

Write '1' to Enable non-maskable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

I RW

PREGION0WA

   

Write '1' to Enable non-maskable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

J RW

PREGION0RA

   

Write '1' to Enable non-maskable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

K RW

PREGION1WA

   

Write '1' to Enable non-maskable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

L RW

PREGION1RA

   

Write '1' to Enable non-maskable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Set

1

Enable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

 

NMIENCLR

Address offset: 0x328

Disable non-maskable interrupt

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id         L K J I                                 H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

REGION0WA

   

Write '1' to Disable non-maskable interrupt for REGION[0].WA event

See EVENTS_REGION[0].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

B RW

REGION0RA

   

Write '1' to Disable non-maskable interrupt for REGION[0].RA event

See EVENTS_REGION[0].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

C RW

REGION1WA

   

Write '1' to Disable non-maskable interrupt for REGION[1].WA event

See EVENTS_REGION[1].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

D RW

REGION1RA

   

Write '1' to Disable non-maskable interrupt for REGION[1].RA event

See EVENTS_REGION[1].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

E RW

REGION2WA

   

Write '1' to Disable non-maskable interrupt for REGION[2].WA event

See EVENTS_REGION[2].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

F RW

REGION2RA

   

Write '1' to Disable non-maskable interrupt for REGION[2].RA event

See EVENTS_REGION[2].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

G RW

REGION3WA

   

Write '1' to Disable non-maskable interrupt for REGION[3].WA event

See EVENTS_REGION[3].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

H RW

REGION3RA

   

Write '1' to Disable non-maskable interrupt for REGION[3].RA event

See EVENTS_REGION[3].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

I RW

PREGION0WA

   

Write '1' to Disable non-maskable interrupt for PREGION[0].WA event

See EVENTS_PREGION[0].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

J RW

PREGION0RA

   

Write '1' to Disable non-maskable interrupt for PREGION[0].RA event

See EVENTS_PREGION[0].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

K RW

PREGION1WA

   

Write '1' to Disable non-maskable interrupt for PREGION[1].WA event

See EVENTS_PREGION[1].WA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

L RW

PREGION1RA

   

Write '1' to Disable non-maskable interrupt for PREGION[1].RA event

See EVENTS_PREGION[1].RA

     

Clear

1

Disable

     

Disabled

0

Read: Disabled

     

Enabled

1

Read: Enabled

 

PERREGION[0].SUBSTATWA

Address offset: 0x400

Source of event/interrupt in region 0, write access detected while corresponding subregion was enabled for watching

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Id f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Id RW Field Value Id Value Description
A RW

SR0

   

Subregion 0 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

B RW

SR1

   

Subregion 1 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

C RW

SR2

   

Subregion 2 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

D RW

SR3

   

Subregion 3 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

E RW

SR4

   

Subregion 4 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

F RW

SR5

   

Subregion 5 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

G RW

SR6

   

Subregion 6 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

H RW

SR7

   

Subregion 7 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

I RW

SR8

   

Subregion 8 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

J RW

SR9

   

Subregion 9 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

K RW

SR10

   

Subregion 10 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

L RW

SR11

   

Subregion 11 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

M RW

SR12

   

Subregion 12 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

N RW

SR13

   

Subregion 13 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

O RW

SR14

   

Subregion 14 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

P RW

SR15

   

Subregion 15 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

Q RW

SR16

   

Subregion 16 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

R RW

SR17

   

Subregion 17 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

S RW

SR18

   

Subregion 18 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

T RW

SR19

   

Subregion 19 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

U RW

SR20

   

Subregion 20 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

V RW

SR21

   

Subregion 21 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

W RW

SR22

   

Subregion 22 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

X RW

SR23

   

Subregion 23 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

Y RW

SR24

   

Subregion 24 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

Z RW

SR25

   

Subregion 25 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

a RW

SR26

   

Subregion 26 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

b RW

SR27

   

Subregion 27 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

c RW

SR28

   

Subregion 28 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

d RW

SR29

   

Subregion 29 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

e RW

SR30

   

Subregion 30 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

f RW

SR31

   

Subregion 31 in region 0 (write '1' to clear)

     

NoAccess

0

No write access occurred in this subregion

     

Access

1

Write access(es) occurred in this subregion

 

PERREGION[0].SUBSTATRA

Address offset: 0x404

Source of event/interrupt in region 0, read access detected while corresponding subregion was enabled for watching

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8