If your external board has custom connections for programming and debugging pins, you can use the debug output on P20.
Connect the boards as shown in the following figure.
It is recommended to power the external board separately from the DK. The voltage on the external board must match that of the DK, which is 1.8 V or 3.0 V depending on the position of SW9 when the DK is powered through the USB connector.
When the interface MCU detects the voltage of the external board on pin 3 (SWD1_SELECT) of P20, it programs or debugs the target chip on the external board instead of the onboard nRF9161 System in Package (SiP).
If there is no separate power supply on the external board, the nRF9161 DK can supply power through pin 2 (VDD) of P20.
The following figure and table show the P20 connector pinouts.
| Pin number | Signal | Description |
|---|---|---|
| 1 | VDD_GPIO | |
| 2 | VDD | Main nRF9161 DK GPIO level power domain |
| 3 | VTG | Voltage supply from the external target, used as a select pin for the interface MCU to enable this port |
| 4 | SWDIO | Serial Wire Debug (SWD) Data line |
| 5 | SWDCLK | Serial wire clock line |
| 6 | SWO | The Serial Wire Output (SWO) line is not used for programming and debugging over SWD |
| 7 | RESET | Reset line |
| 8 | SEL | |
| 9 | VIN 5V | |
| 10 | VDD_nRF | nRF9161 SiP power domain |
| 11 | VDD_5V | |
| 12 | VIO_REF | GPIO voltage reference input |
| 13 | ID | ID resistor to ground |