nRF7002 EB v0.9.0

Castellated edge holes

The nRF7002 Expansion Board (EB) has castellated holes on the side of the board that connect to the nRF7002 companion Integrated Circuit (IC).

The castellated edge holes have 2.540 mm pitch and 17.778 mm row spacing.

The following figure and table show the pinout for the nRF7002 EB.

Figure 1. Castellated edge hole numbering
Castellated edge hole numbering
Table 1. Castellated edge hole pinout
Pin Signal name Function
1 CLK QSPI Clock / SPI Clock
2 CS QSPI slave select / SPI slave select
3 D0 QSPI DATA0 / SPI_MOSI
4 D1 QSPI DATA1 / SPI_MISO
5 D2 QSPI DATA2
6 D3 QSPI DATA3
7 CT0 SW1_CTRL0 (not supported on nRF7002 EB)
8 ST1 Coexistence interface priority signal (only applicable for 4-wire coexistence interface)
9 GND Ground
10 VBAT Supply voltage
11 GND Ground
12 VIO IO Supply voltage
13 ST0 Coexistence interface status signal
14 EN Power enable signal
15 REQ Coexistence interface request signal
16 GRT Coexistence interface grant signal
17 IRQ Host interrupt signal
18 GND Ground

If using the EB only as a breakout board with no need for the PCB edge connector, the PCB edge connector can be broken off. The following figure shows the perforated break-off line at the neck of the connector.

Figure 2. PCB connector break-off line
PCB connector break-off line