nRF5340 PDK v1.0.0

Debug input and trace

The Debug in connector (P18) makes it possible to connect external debuggers for debugging when the interface MCU USB cable is not connected or the board is in nRF only mode.

Figure 1. Debug input and trace connectors
Debug input connector (P18) and trace connector (P25) on nRF5340 PDK board

For trace, a footprint for a 20-pin connector is available (P25). If trace functionality is required, it is possible to mount a 2×10 pin 1.27 mm pitch surface mount pin header.

Table 1. Default and Trace GPIOs
GPIO Trace Default use
P0.12 TRACECLK  
P0.11 TRACEDATA[0]  
P0.10 TRACEDATA[1]  
P0.09 TRACEDATA[2] Button 4
P0.08 TRACEDATA[3] Button 3

The reference voltage for the debug input and trace is by default connected to VDD_nRF'. This can be connected to the VDD by cutting SB60 and soldering SB59.