Interrupt priority levels

This section gives an overview of interrupt levels used by the SoftDevice and the interrupt levels that are available for the application.

To implement the SoftDevice Application Programming Interface (API) as Supervisor Call (SVC)s (see Application programming interface) and ensure that embedded protocol real-time requirements are met independently of the application processing, the SoftDevice implements an interrupt model where application interrupts and SoftDevice interrupts are interwoven. This model will result in application interrupts being postponed or preempted, leading to longer perceived application interrupt latency and interrupt execution times.

The application must take care to select the correct interrupt priorities for application events according to the guidelines that follow. The NVIC API to the System on Chip (SoC) Library supports safe configuration of interrupt priorities from the application.

The nRF52 SoC has eight configurable interrupt priorities ranging from 0 to 7 (with 0 being highest priority). On reset, all interrupts are configured with the highest priority (0).

The SoftDevice reserves and uses the following priority levels, which must remain unused by the application programmer:

The application can use the remaining interrupt priority levels, in addition to the main, or thread, context.

Figure 1. Exception model
Exception model

As seen from Exception model, the application has available priority level 2 and 3, located between the higher and lower priority levels reserved by the SoftDevice. This enables a low-latency application interrupt to support fast sensor interfaces. An application interrupt at priority level 2 or 3 will only experience latency from SoftDevice interrupts at priority levels 0 and 1, while application interrupts at priority levels 5, 6, or 7 can experience latency from all SoftDevice priority levels.

Note: The priorities of the interrupts reserved by the SoftDevice cannot be changed. This includes the SVC interrupt. Handlers running at a priority level higher than 4 (lower numerical priority value) have neither access to SoftDevice functions nor to application specific SVCs or RTOS functions running at lower priority levels (higher numerical priority values).

The following figure shows an example of how interrupts with different priorities may run and preempt each other. Some priority levels are left out for clarity.

Figure 2. SoftDevice exception examples
SoftDevice exception examples