FICR — Factory information configuration registers

Factory information configuration registers (FICR) are pre-programmed in factory and cannot be erased by the user. These registers contain chip-specific information and configuration.

Registers

Table 1. Instances
Base address Peripheral Instance Secure mapping DMA security Description Configuration
0x00FF0000 FICR FICR S NA

Factory information configuration

   
Table 2. Register overview
Register Offset Security Description
INFO.DEVICEID[0] 0x204  

Device identifier

 
INFO.DEVICEID[1] 0x208  

Device identifier

 
INFO.PART 0x20C  

Part code

 
INFO.VARIANT 0x210  

Part Variant, Hardware version and Production configuration

 
INFO.PACKAGE 0x214  

Package option

 
INFO.RAM 0x218  

RAM variant

 
INFO.FLASH 0x21C  

Flash variant

 
INFO.CODEPAGESIZE 0x220  

Code memory page size

 
INFO.CODESIZE 0x224  

Code memory size

 
INFO.DEVICETYPE 0x228  

Device type

 
TRIMCNF[n].ADDR 0x300  

Address

 
TRIMCNF[n].DATA 0x304  

Data

 
TRNG90B.BYTES 0xC00  

Amount of bytes for the required entropy bits

 
TRNG90B.RCCUTOFF 0xC04  

Repetition counter cutoff

 
TRNG90B.APCUTOFF 0xC08  

Adaptive proportion cutoff

 
TRNG90B.STARTUP 0xC0C  

Amount of bytes for the startup tests

 
TRNG90B.ROSC1 0xC10  

Sample count for ring oscillator 1

 
TRNG90B.ROSC2 0xC14  

Sample count for ring oscillator 2

 
TRNG90B.ROSC3 0xC18  

Sample count for ring oscillator 3

 
TRNG90B.ROSC4 0xC1C  

Sample count for ring oscillator 4

 

INFO.DEVICEID[n] (n=0..1)

Address offset: 0x204 + (n × 0x4)

Device identifier

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

DEVICEID

   

64 bit unique device identifier

DEVICEID[0] contains the least significant bits of the device identifier. DEVICEID[1] contains the most significant bits of the device identifier.

INFO.PART

Address offset: 0x20C

Part code

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00009160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0
ID Access Field Value ID Value Description
A R

PART

   

Part code

     

N9160

0x9160

nRF9160

INFO.VARIANT

Address offset: 0x210

Part Variant, Hardware version and Production configuration

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x0FFFFFFF 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

VARIANT

   

Part Variant, Hardware version and Production configuration, encoded as ASCII

     

AAAA

0x41414141

AAAA

     

AAA0

0x41414130

AAA0

INFO.PACKAGE

Address offset: 0x214

Package option

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00002000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
ID Access Field Value ID Value Description
A R

PACKAGE

   

Package option

     

CC

0x2000

CCxx - 236 ball wlCSP

INFO.RAM

Address offset: 0x218

RAM variant

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
ID Access Field Value ID Value Description
A R

RAM

   

RAM variant

     

K256

0x100

256 kByte RAM

     

Unspecified

0xFFFFFFFF

Unspecified

INFO.FLASH

Address offset: 0x21C

Flash variant

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
ID Access Field Value ID Value Description
A R

FLASH

   

Flash variant

     

K1024

0x400

1 MByte FLASH

INFO.CODEPAGESIZE

Address offset: 0x220

Code memory page size

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00001000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
ID Access Field Value ID Value Description
A R

CODEPAGESIZE

   

Code memory page size

INFO.CODESIZE

Address offset: 0x224

Code memory size

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
ID Access Field Value ID Value Description
A R

CODESIZE

   

Code memory size in number of pages

Total code space is: CODEPAGESIZE * CODESIZE

INFO.DEVICETYPE

Address offset: 0x228

Device type

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

DEVICETYPE

   

Device type

     

Die

0x0000000

Device is an physical DIE

     

FPGA

0xFFFFFFFF

Device is an FPGA

TRIMCNF[n].ADDR (n=0..255)

Address offset: 0x300 + (n × 0x8)

Address

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

Address

   

Address

TRIMCNF[n].DATA (n=0..255)

Address offset: 0x304 + (n × 0x8)

Data

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

Data

   

Data

TRNG90B.BYTES

Address offset: 0xC00

Amount of bytes for the required entropy bits

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

BYTES

   

Amount of bytes for the required entropy bits

TRNG90B.RCCUTOFF

Address offset: 0xC04

Repetition counter cutoff

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

RCCUTOFF

   

Repetition counter cutoff

TRNG90B.APCUTOFF

Address offset: 0xC08

Adaptive proportion cutoff

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

APCUTOFF

   

Adaptive proportion cutoff

TRNG90B.STARTUP

Address offset: 0xC0C

Amount of bytes for the startup tests

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0
ID Access Field Value ID Value Description
A R

STARTUP

   

Amount of bytes for the startup tests

TRNG90B.ROSC1

Address offset: 0xC10

Sample count for ring oscillator 1

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

ROSC1

   

Sample count for ring oscillator 1

TRNG90B.ROSC2

Address offset: 0xC14

Sample count for ring oscillator 2

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

ROSC2

   

Sample count for ring oscillator 2

TRNG90B.ROSC3

Address offset: 0xC18

Sample count for ring oscillator 3

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

ROSC3

   

Sample count for ring oscillator 3

TRNG90B.ROSC4

Address offset: 0xC1C

Sample count for ring oscillator 4

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID Access Field Value ID Value Description
A R

ROSC4

   

Sample count for ring oscillator 4