nRF7002 supports several Quad Serial Peripheral Interface (QSPI) commands.
Command (byte) | RDSR (read status register 0) | RDSR1 (read status register 1) | RDSR2 (read status register 2) | WRSR2 (write status register 2) | CIPHER INIT (Initialize cipher) | FAST READ (fast read data) | READ4 (4 x I/O read command) | PP (Page program) | PP4 (Quad page program) |
---|---|---|---|---|---|---|---|---|---|
1st byte | 0x05 | 0x1F | 0x2F | 0x3F | 0x4F | 0x0B | 0xEB | 0x02 | 0x38 |
2nd byte | NONCE1 | AD1 | ADD (4) and Dummy (4) | AD1 | ADD (4) | ||||
3rd byte | NONCE2 | AD2 | Dummy (4) | AD2 | |||||
4th byte | NONCE3 | AD3 | AD3 | ||||||
5th byte | NONCE4 | Dummy | |||||||
Action | To read out the values of status register 0 | To read out the values of status register 1 | To read out the values of status register 2 | To write in the values of status register 2 | To enable the steam cipher and initialize the NONCE register | n bytes read out until SS goes high | n bytes read out by 4 x I/O until SS goes high | to program the selected page | Quad input to program the selected page |
For RDSR, RDSR1, RDSR2, FAST_READ, and READ4, the shifted-in instruction sequence is followed by a data-out sequence. After any bit of data being shifted out, the SS can be high.
For CIPHER_INIT, PP, and PP4, the SS must go high exactly at the 4th byte (32 bits) boundary or the value will not be stored.
For WRSR2, the SS must go high exactly at the 1st byte (8 bits) boundary or the value will not be stored.
The following figure shows the timing diagram for the RDSR command. The other commands that access status registers have the same format but with a different 1st byte.
The following figure shows the timing diagram for the cipher initialization command.
The following figures show the timing diagram for the data read and program commands.