FICR — Factory information configuration registers

Factory information configuration registers (FICR) are pre-programmed in factory and cannot be erased by the user. These registers contain chip-specific information and configuration.

Note: FICR is not accessible from the network core.
Parent topic: Application core

Registers

Table 1. Instances
Base address Domain Peripheral Instance Secure mapping DMA security Description Configuration
0x00FF0000 APPLICATION FICR FICR S NA

Factory information configuration registers

    
Table 2. Register overview
Register Offset Security Description
INFO.CONFIGID 0x200  

Configuration identifier

  
INFO.DEVICEID[n] 0x204  

Device identifier

  
INFO.PART 0x20C  

Part code

  
INFO.VARIANT 0x210  

Part Variant, Hardware version and Production configuration

  
INFO.PACKAGE 0x214  

Package option

  
INFO.RAM 0x218  

RAM variant

  
INFO.FLASH 0x21C  

Flash variant

  
INFO.CODEPAGESIZE 0x220  

Code memory page size in bytes

  
INFO.CODESIZE 0x224  

Code memory size

  
INFO.DEVICETYPE 0x228  

Device type

  
TRIMCNF[n].ADDR 0x300  

Address of the PAR register which will be written

  
TRIMCNF[n].DATA 0x304  

Data

  
NFC.TAGHEADER0 0x450  

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

  
NFC.TAGHEADER1 0x454  

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

  
NFC.TAGHEADER2 0x458  

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

  
NFC.TAGHEADER3 0x45C  

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

  
TRNG90B.BYTES 0xC00  

Amount of bytes for the required entropy bits

  
TRNG90B.RCCUTOFF 0xC04  

Repetition counter cutoff

  
TRNG90B.APCUTOFF 0xC08  

Adaptive proportion cutoff

  
TRNG90B.STARTUP 0xC0C  

Amount of bytes for the startup tests

  
TRNG90B.ROSC1 0xC10  

Sample count for ring oscillator 1

  
TRNG90B.ROSC2 0xC14  

Sample count for ring oscillator 2

  
TRNG90B.ROSC3 0xC18  

Sample count for ring oscillator 3

  
TRNG90B.ROSC4 0xC1C  

Sample count for ring oscillator 4

  
XOSC32MTRIM 0xC20  

XOSC32M capacitor selection trim values

  
Parent topic: Application core

INFO.CONFIGID

Address offset: 0x200

Configuration identifier

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                 A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

HWID

    

Identification number for the HW

Parent topic: Application core

INFO.DEVICEID[n] (n=0..1)

Address offset: 0x204 + (n × 0x4)

Device identifier

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

DEVICEID

    

64 bit unique device identifier

DEVICEID[0] contains the least significant bits of the device identifier. DEVICEID[1] contains the most significant bits of the device identifier.

Parent topic: Application core

INFO.PART

Address offset: 0x20C

Part code

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00005340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 1 0 1 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

PART

    

Part code

     

N5340

0x5340

nRF5340

     

Unspecified

0xFFFFFFFF

Unspecified

Parent topic: Application core

INFO.VARIANT

Address offset: 0x210

Part Variant, Hardware version and Production configuration

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

VARIANT

    

Part Variant, Hardware version and Production configuration, encoded as ASCII

     

QKAA

0x514B4141

QKAA

     

CLAA

0x434C4141

CLAA

     

Unspecified

0xFFFFFFFF

Unspecified

Parent topic: Application core

INFO.PACKAGE

Address offset: 0x214

Package option

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

PACKAGE

    

Package option

     

QK

0x2000

QKxx - 94-pin aQFN

     

CL

0x2005

CLxx - WLCSP

     

Unspecified

0xFFFFFFFF

Unspecified

Parent topic: Application core

INFO.RAM

Address offset: 0x218

RAM variant

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

RAM

    

RAM variant

     

K16

0x10

16 kByte RAM

     

K32

0x20

32 kByte RAM

     

K64

0x40

64 kByte RAM

     

K128

0x80

128 kByte RAM

     

K256

0x100

256 kByte RAM

     

K512

0x200

512 kByte RAM

     

Unspecified

0xFFFFFFFF

Unspecified

Parent topic: Application core

INFO.FLASH

Address offset: 0x21C

Flash variant

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

FLASH

    

Flash variant

     

K128

0x80

128 kByte FLASH

     

K256

0x100

256 kByte FLASH

     

K512

0x200

512 kByte FLASH

     

K1024

0x400

1 MByte FLASH

     

K2048

0x800

2 MByte FLASH

     

Unspecified

0xFFFFFFFF

Unspecified

Parent topic: Application core

INFO.CODEPAGESIZE

Address offset: 0x220

Code memory page size in bytes

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00001000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

CODEPAGESIZE

    

Code memory page size in bytes

     

K4096

0x1000

4 kByte

Parent topic: Application core

INFO.CODESIZE

Address offset: 0x224

Code memory size

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

CODESIZE

    

Code memory size in number of pages

Total code space is: CODEPAGESIZE * CODESIZE bytes

     

P256

256

256 pages

Parent topic: Application core

INFO.DEVICETYPE

Address offset: 0x228

Device type

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A R

DEVICETYPE

    

Device type

     

Die

0x0000000

Device is an physical DIE

     

FPGA

0xFFFFFFFF

Device is an FPGA

Parent topic: Application core

TRIMCNF[n].ADDR (n=0..31)

Address offset: 0x300 + (n × 0x8)

Address of the PAR register which will be written

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

Address

    

Address

Parent topic: Application core

TRIMCNF[n].DATA (n=0..31)

Address offset: 0x304 + (n × 0x8)

Data

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

Data

    

Data to be written into the PAR register

Parent topic: Application core

NFC.TAGHEADER0

Address offset: 0x450

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID D D D D D D D D C C C C C C C C B B B B B B B B A A A A A A A A
Reset 0xFFFFFF5F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

MFGID

    

Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F

B R

UD1

    

Unique identifier byte 1

C R

UD2

    

Unique identifier byte 2

D R

UD3

    

Unique identifier byte 3

Parent topic: Application core

NFC.TAGHEADER1

Address offset: 0x454

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID D D D D D D D D C C C C C C C C B B B B B B B B A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A-D R

UD[i] (i=4..7)

    

Unique identifier byte i

Parent topic: Application core

NFC.TAGHEADER2

Address offset: 0x458

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID D D D D D D D D C C C C C C C C B B B B B B B B A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A-D R

UD[i] (i=8..11)

    

Unique identifier byte i

Parent topic: Application core

NFC.TAGHEADER3

Address offset: 0x45C

Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID D D D D D D D D C C C C C C C C B B B B B B B B A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A-D R

UD[i] (i=12..15)

    

Unique identifier byte i

Parent topic: Application core

TRNG90B.BYTES

Address offset: 0xC00

Amount of bytes for the required entropy bits

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0x00000210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0
ID R/W Field Value ID Value Description
A R

BYTES

    

Amount of bytes for the required entropy bits

Parent topic: Application core

TRNG90B.RCCUTOFF

Address offset: 0xC04

Repetition counter cutoff

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

RCCUTOFF

    

Repetition counter cutoff

Parent topic: Application core

TRNG90B.APCUTOFF

Address offset: 0xC08

Adaptive proportion cutoff

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

APCUTOFF

    

Adaptive proportion cutoff

Parent topic: Application core

TRNG90B.STARTUP

Address offset: 0xC0C

Amount of bytes for the startup tests

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

STARTUP

    

Amount of bytes for the startup tests

Parent topic: Application core

TRNG90B.ROSC1

Address offset: 0xC10

Sample count for ring oscillator 1

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

ROSC1

    

Sample count for ring oscillator 1

Parent topic: Application core

TRNG90B.ROSC2

Address offset: 0xC14

Sample count for ring oscillator 2

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

ROSC2

    

Sample count for ring oscillator 2

Parent topic: Application core

TRNG90B.ROSC3

Address offset: 0xC18

Sample count for ring oscillator 3

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

ROSC3

    

Sample count for ring oscillator 3

Parent topic: Application core

TRNG90B.ROSC4

Address offset: 0xC1C

Sample count for ring oscillator 4

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

ROSC4

    

Sample count for ring oscillator 4

Parent topic: Application core

XOSC32MTRIM

Address offset: 0xC20

XOSC32M capacitor selection trim values

Note: To enable the optional internal capacitors on XC1 and XC2 pins, see to the "Using internal capacitors" section of the OSCILLATORS chapter.
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID                                             B B B B B A A A A A
Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
ID R/W Field Value ID Value Description
A R

SLOPE

  

[-16..15]

Slope trim factor on twos complement form

-16: Minimum slope

15: Maximum slope

B R

OFFSET

  

[31..0]

Offset trim factor on integer form

0: Minimum offset

31: Maximum offset

Parent topic: Application core
This document was last updated on 2023-12-04.
Please send us your feedback about the documentation! For technical questions, visit the Nordic Developer Zone.