SAADC — Successive approximation analog-to-digital converter

Each SAADC channel can be configured to use either single-ended or differential input mode.

The configuration is done using the registers CH[n].CONFIG (n=0..7). In single-ended mode, the negative channel input is shorted to ground internally and the setting in the corresponding register CH[n].PSELN (n=0..7) will not apply. The assumption in single-ended mode is that the internal ground of the SAADC is the same as the external ground that the measured voltage is referred to. The SAADC is thus sensitive to ground bounce on the PCB in single-ended mode. If this is a concern, using differential measurement is recommended. In differential mode, both positive and negative input has to be configured in registersCH[n].PSELP (n=0..7) and CH[n].PSELN (n=0..7) respectively.

Each SAADC channel can have individual reference and gain settings.

This is configured in registers CH[n].CONFIG (n=0..7). Available configuration options are:

• VDD/4 or internal 0.6 V reference
• Gain ranging from 1/6 to 4

The gain setting can be used to control the effective input range of the SAADC:

Input range = (±0.6 V or ±VDD/4)/gain

For example, selecting VDD as reference, single-ended input (grounded negative input), and a gain of 1/4 will result in the following input range:

Input range = (VDD/4)/(1/4) = VDD

With internal reference, single-ended input (grounded negative input) and a gain of 1/6, the input range will be:

Input range = (0.6 V)/(1/6) = 3.6 V

Inputs AIN0 through AIN7 cannot exceed VDD or be lower than VSS.

The digital output value from the SAADC is calculated using a formula.

RESULT = (V(P) – V(N)) * (GAIN/REFERENCE) * 2(RESOLUTION - m)

where

V(P)

is the voltage at input P

V(N)

is the voltage at input N

GAIN

is the selected gain

REFERENCE

is the selected reference voltage

RESOLUTION

is output resolution in bits, as configured in register RESOLUTION

m

is 0 for single-ended channels

is 1 for differential channels

Results are sign extended to 16 bits and stored as little-endian byte order in RAM.

The SAADC resources are started by triggering the START task. The SAADC is using EasyDMA to store results in a result buffer in RAM.

Registers RESULT.PTR and RESULT.MAXCNT must be configured before SAADC is started.

The result buffer is located at the address specified in register RESULT.PTR. This register is double-buffered, and it can be updated and prepared for the next START task immediately after the STARTED event is generated. The size of the result buffer is specified in register RESULT.MAXCNT, and the SAADC will generate an END event when it has filled up the result buffer, as illustrated in the following figure:

Figure 4. SAADC

The following figure shows how results are placed in RAM when multiple channels are enabled, and value in RESULT.MAXCNT is an even number:

Figure 5. Example of RAM placement: RESULT.MAXCNT even number, channels 1, 2 and 5 enabled

The following figure shows how results are placed in RAM when multiple channels are enabled and value in RESULT.MAXCNT is an odd number:

Figure 6. Example of RAM placement: RESULT.MAXCNT odd number, channels 1, 2 and 5 enabled

The last 32-bit word is populated only with one 16-bit result. In both examples, channels 1, 2 and 5 are enabled, and all others are disabled.

See Memory for more information about the different memory regions.

EasyDMA is finished with accessing RAM when events END or STOPPED are generated. The register RESULT.AMOUNT can then be read, to see how many results have been transferred to the result buffer in RAM since the START task was triggered.

When using continuous sampling, new samples are automatically taken at a fixed sample rate.

Continuous sampling of both single and multiple channels can be implemented using a general purpose timer connecting a timer event to SAADC's SAMPLE task via PPI.

Alternatively, continuous sampling can be implemented by using the internal timer in the SAADC by setting the MODE field in register SAMPLERATE to Timers. The sample rate (frequency at which the SAMPLE task is triggered) is configured in the same register. The internal timer and the continuous sampling are started by triggering the START task and stopped using the STOP task.

For continuous sampling, ensure that the sample rate fullfills the following criteria:

f_SAMPLE < 1/[t_ACQ + t_conv]

An accumulator in the SAADC can be used to find the average of several analog input samples. In general, oversampling improves the signal-to-noise ratio (SNR). Oversampling does not improve the integral non-linearity (INL) or differential non-linearity (DNL).

The accumulator is controlled in the OVERSAMPLE register. When using oversampling, 2^OVERSAMPLE input samples are averaged before the sample result is transferred to memory. Hence, the SAMPLE task must be triggered 2^OVERSAMPLE times for each output value. The following events are relevant:

• DONE event is generated for every input sample taken
• RESULTDONE event is generated for every averaged value ready to be transferred into RAM
• END event is generated when averaged values defined in RESULT.MAXCNT have been written to memory. END event is generated every 2^OVERSAMPLE time the DONE event is generated.

If value in OVERSAMPLE is set to 0, the DONE and RESULTDONE events will be generated at the same rate.

A channel can be event monitored by using limits.

Limits are configured in CH[n].LIMIT register, with high limit and low limit.

Appropriate events are generated whenever the conversion results (sampled input signals) are outside of the two defined limits. It is not possible to generate an event when the input signal is inside a defined range by swapping high and low limits. An example of event montitoring using limits is illustrated in the following figure:

Figure 7. Example: Event monitoring on channel n using limits

The comparison to limits always takes place, it does not need to be specifically enabled. If comparison is not required on a channel, the software ignores the related events. In that situation, the value of the limits defined in register is irrelevant, i.e. it does not matter if the low limit is lower than the high limit or not.

The SAADC has a temperature dependent offset.

Therefore, it is recommended to calibrate the SAADC at least once before use, and to re-run calibration every time the ambient temperature has changed by more than 10 °C.

Offset calibration is started by triggering the CALIBRATEOFFSET task, and the CALIBRATEDONE event is generated when calibration is done.