Pin assignments

The pin assignment figure and table describe the assignments for this variant of the chip.

Figure 1. QFN32 pin assignments (top view)

Table 1. QFN32 pin assignments

Pin	Name	Function	Description
1	VOUT1	Power	BUCK1 output
2	PVSS1	Power	BUCK1 power ground
3	SW1	Power	BUCK1 regulator output to inductor
4	PVDD	Power	BUCK[n] power input
5	SW2	Power	BUCK2 regulator output to inductor
6	PVSS2	Power	BUCK2 power ground
7	GPIO0	Digital I/O	GPIO0
8	GPIO1	Digital I/O	GPIO1
9	GPIO2	Digital I/O	GPIO2
10	GPIO3	Digital I/O	GPIO3
11	GPIO4	Digital I/O	GPIO4
12	VDDIO	Power	Supply for TWI and GPIOs
13	SDA	Digital I/O	TWI data
14	SCL	Digital input	TWI clock
15	SHPHLD	Digital input	Ship mode hold
16	VSET2	Analog input	Voltage set for BUCK2 to resistor
17	VSET1	Analog input	Voltage set for BUCK1 to resistor
18	NTC	Analog input	Battery thermistor
19	VBAT	Power	Battery
20	VSYS	Power	System voltage output
21	VBUS	Power	Input supply
22	VBUSOUT	Analog output	VBUS output for host
23	CC1	Analog input	USB Type-C configuration channel 1
24	CC2	Analog input	USB Type-C configuration channel 2
25	LED0	Analog output	LEDDRV0 output
26	LED1	Analog output	LEDDRV1 output
27	LED2	Analog output	LEDDRV2 output
28	LSIN1/VINLDO1	Power	LOADSW1 supply or LDO1 input
29	LSOUT1/VOUTLDO1	Power	LOADSW1 or LDO1 output
30	LSIN2/VINLDO2	Power	LOADSW2 supply or LDO2 input
31	LSOUT2/VOUTLDO2	Power	LOADSW2 or LDO2 output
32	VOUT2	Power	BUCK2 output
Exposed pad	AVSS	Power	Ground

The ball assignment figure and table describe the ball assignments for this variant of the chip.

Figure 2. WLCSP ball assignment (top view)

Table 2. Pin descriptions

Ball	Name	Function	Description
A1	LED0	Analog output	LEDDRV0 output
A2	LED1	Analog output	LEDDRV1 output
A3	LED2	Analog output	LEDDRV2 output
A4	LSOUT1/VOUTLDO1	Power	LOADSW1 or LDO1 output
A5	LSOUT2/VOUTLDO2	Power	LOADSW2 or LDO2 output
A6	AVSS	Power	Ground
A7	PVSS1	Power	BUCK1 power ground
B1, B2	VBUS	Power	Input supply
B3	CC2	Analog input	USB Type-C configuration channel 2
B4	LSIN1/VINLDO1	Power	LOADSW1 supply or LDO1 input
B5	LSIN2/VINLDO2	Power	LOADSW2 supply or LDO2 input
B6	VOUT1	Power	BUCK1 output
B7	SW1	Power	BUCK1 regulator output to inductor
C1, C2	VSYS	Power	System voltage output
C3	VBUSOUT	Analog output	VBUS output for host
C4	GPIO3	Digital I/O	GPIO3
C5	GPIO2	Digital I/O	GPIO2
C6	VOUT2	Power	BUCK2 output
C7	PVDD	Power	Power input for BUCK[n]
D1, D2	VBAT	Power	Battery
D3	NTC	Analog input	Battery thermistor
D4	SHPHLD	Digital input	Ship mode hold
D5	CC1	Analog input	USB Type-C configuration channel 1
D6	GPIO0	Digital I/O	GPIO0
D7	SW2	Power	BUCK2 regulator output to inductor
E1	VSET2	Analog input	Voltage set for BUCK2 to resistor
E2	VSET1	Analog input	Voltage set for BUCK1 to resistor
E3	SCL	Digital input	TWI clock
E4	VDDIO	Power	Supply for TWI and GPIOs
E5	SDA	Digital I/O	TWI data
E6	GPIO1	Digital I/O	GPIO1
E7	PVSS2	Power	BUCK2 power ground