Reference circuitry

Documentation for the different package reference circuits, including Altium Designer files, PCB layout files, and PCB production files, can be downloaded from www.nordicsemi.com.

The following reference circuits for nPM1300 show the schematics and components to support different configurations in a design.

Table 1. PCB application configuration
	Configuration 1	Configuration 2	Configuration 3
Description	Full configuration	Simple configuration	Minimal configuration
BUCKs	Both configured	One configured	Not used
LOADSWs	Both configured, LDO mode	One configured, load switch mode	Not used
Ship mode exit	Configured	Configured	Not used
Charging	Available	Available	Available
Battery thermistor	Configured	Configured	Not used
LEDs	Three available	One available	Not used
GPIOs	Configured	Configured	Configured
TWI	Configured	Configured	Configured
VSET1	47 kΩ ±1%	47 kΩ ±1%	Not used
VSET2	150 kΩ ±1%	Not used	Not used
VOUT1	1.8 V	1.8 V	Not used
VOUT2	3.0 V	Not used	Not used
VBUSOUT	Configured	Configured	Not used
VDDIO	Configured	Configured	Configured

Configuration 1

Figure 1. QFN schematic

Figure 2. WLCSP schematic

Table 2. Bill of material
Designator	Value	Description	Footprint
C1, C5	1.0 μF	Capacitor, X5R, 10 V, ±10%	0603
C2, C3, C4, C7, C8, C9, C10, C11, C12	10 μF	Capacitor, X5R, 25 V, ±20%	0603
C6	2.2 μF	Capacitor, X7R, 16 V, ±10%	0603
C13	100 nF	Capacitor, X5R, ±10%	0201
L1, L2	2.2 μH	Inductor, DCR < 400 mΩ, ±20%	0806
R1, R2	Dependent on bus speed and parasitic capacitances	Optional pull-up resistors for TWI, 0.05 W, ±1%	0201
R3, R4	See Output voltage selection	Resistors for setting the BUCK1 and BUCK2 output voltages, 0.05 W, ±1%	0201
U1	nPM1300	nPM1300	QFN32 or WLCSP35

Configuration 2

Figure 3. QFN schematic

Figure 4. WLCSP schematic

Table 3. Bill of material
Designator	Value	Description	Footprint
C1, C5, C14	1.0 μF	Capacitor, X5R, 10 V, ±10%	0603
C2, C4, C7	10 μF	Capacitor, X5R, 25 V, ±20%	0603
C6	2.2 μF	Capacitor, X5R, 25 V, ±10%	0603
C13	100 nF	Capacitor, X5R, 25 V, ±10%	0201
L1	2.2 μH	Inductor, DCR < 400 mΩ, ±20%	0806
R1, R2	Dependent on bus speed and parasitic capacitances	Optional pull-up resistors for TWI, 0.05 W, ±1%	0201
R3	See Output voltage selection	Resistors for setting the BUCK1 and BUCK2 output voltages, 0.05 W, ±1%	0201
U1	nPM1300	nPM1300	QFN32 or WLCSP35

Configuration 3

Figure 5. QFN schematic

Figure 6. WLCSP schematic

Table 4. Bill of material
Designator	Value	Description	Footprint
C1, C5	1.0 μF	Capacitor, X5R, 10 V, ±10%	0603
C4	10 μF	Capacitor, X5R, 25 V, ±20%	0603
C6	2.2 μF	Capacitor, X7R, 16 V, ±10%	0603
C13	100 nF	Capacitor, X5R, ±10%	0201
R1, R2	Dependent on bus speed and parasitic capacitances	Optional pull-up resistors for TWI, 0.05 W, ±1%	0201
U1	nPM1300	nPM1300	QFN32 or WLCSP35

PCB guidelines

A well designed PCB is necessary to achieve good performance. A poor layout can lead to loss in performance or functionality.

To ensure functionality, it is essential to follow the schematics and layout references closely.

A PCB with a minimum of two layers, including a ground plane, is recommended for optimal performance.

The BUCK supply voltage should be decoupled with high performance capacitors as close as possible to the supply pins.

Long power supply lines on the PCB should be avoided. All device grounds, VDD connections, and VDD bypass capacitors must be connected as close as possible to the device.