PCB layout design

When designing the Printed Circuit Board (PCB) layout, pin-specific recommendations should be followed.

The VDD1 and VDD2 pins have the following recommendations:

• Place low DCR (<0.1 Ω) ferrite bead FB1 closest to the VDD1 pin to suppress noise from nRF9160.
• Place capacitors C4 (C11) and C3 (C10) close to the VDD pins for improved power delivery.
• Place capacitors C1 (C8) and C2 (C9) close to the VDD pins to filter high-frequency signal components, especially if the product integrates an internal LTE or Global Positioning System (GPS) antenna.
• Connect capacitors to the same ground plane as nRF9160 (pin 103) using low impedance ground connections.
• Use wide enough tracks (DCR <0.1 Ω) for VDD routing to minimize voltage drops and unwanted power consumption coming from routing losses under high current conditions.
• Avoid supply routings close or adjacent to sensitive routings, such as RF.
• Use shielded PCB layers for routings whenever possible to minimize radiated noise.
• Use plenty of ground vias along supply routings to minimize unwanted voltage differences in the application PCB's metal layers.
• A series solder bridge is recommended in the VDD routing for current consumption measurements or other diagnostic purposes.