New features

Cortex®-M4F

The Cortex-M4F processor has been implemented with the following options:

• Memory Protection Unit (MPU)
• Floating Point Unit (FPU)
• SysTick Timer
• Priority bits: 3
• Endian: Little Endian
• Interrupts: One per peripheral ID

Debugging

Cortex-M4F has been implemented with full debug and trace support:

• Debug Access Port (DAP)
• Flash Patch and Breakpoint Unit (FPB) supports:
  • Two literal/data comparators
  • Six instruction comparators
• Data Watchpoint and Trace Unit (DWT)
  • 4 comparators
• Instrumentation Trace Macrocell (ITM)
• Embedded Trace Macrocell (ETM)
• Trace Port Interface Unit (TPIU)
  • 5-pin parallel trace
  • Single pin serial trace (SWO)

Trace debug functionality is available in the nRF52 Series, which requires additional pins. The register TRACECONFIG of the CLOCK peripheral can be used to set the multiplexing function of the trace pins along with the trace clock speed. For details on how to use the debug and trace capabilities, please read the debug documentation of your IDE.

CLOCK

In the nRF52 Series, the high frequency clock (HFCLK) is sourced from either an internal oscillator, or a crystal oscillator controlled by an external 32 MHz crystal. The CPU runs at 64 MHz, while the peripheral clocks run at lower frequencies; the TIMER, for example, uses a 16 MHz clock as in the nRF51 Series. The crystal oscillator must be used as the HFCLK source when running the radio or calibrating the 32.768 kHz RC oscillator. The crystal oscillator on nRF52 is started the same way as on the nRF51 Series, using the HFCLKSTART task.

Block protect

The Block protect (BPROT) partly replaces the memory protection unit (MPU) in nRF51. The PERR0 and RLENR0 registers that provided write protection of peripherals and RAM are removed in the nRF52 Series in which there is no two-region protection scheme as in the nRF51 Series, but the same functionality is available by configuring the new memory watch unit (MWU) peripheral.

RADIO

New features:

• TXPOWER modes configurable from +4 dBm to -40 dBm.
• Support for Bluetooth® Low Energy packet length extension.
• Fast radio ramp-up time (40 µs).

NFCT

Near Field Communication Tag (NFCT). This is a new peripheral introduced in the nRF52 Series. The NFC Tag supports the ISO/IEC 14443-2 PICC device with communication signal interface type A and 106 kbps bit rate.

UART

An additional UART peripheral (UARTE) is added. This new peripheral has EasyDMA support for CPU offloading.

SPI

There are three peripheral IDs for serial peripheral interfaces, each capable of acting as SPIS, SPIM or SPI. EasyDMA support is added to SPIS/SPIM for CPU offloading.

TWI

There are two peripheral IDs for two-wire interfaces, each capable of acting as TWIS, TWIM or TWI. EasyDMA supports is added to TWIS and TWIM for CPU offloading.

COMP

The General purpose comparator is a new feature in the nRF52 Series, and can work in a differential or single-ended mode. The COMP and LPCOMP peripherals are mutually exclusive and cannot be used together.

ADC

The ADC peripheral is replaced by a differential Successive Approximation Register Analog to Digital Converter (SAADC). The interface is not backwards compatible, but has added features, such as support for up to 4 differential inputs and EasyDMA for CPU offloading.

TIMERn

Additional timer instances are added, TIMER3 and TIMER4. All timers now support all bit modes (8, 16, 24, and 32 bits).

RTC

An additional RTC instance is added, RTC2.

GPIOTE

The GPIO Tasks and Events (GPIOTE) peripheral changes:

• Number of tasks/events increased from 4 to 8.
• Set and Clear tasks have been added in addition to the existing Out task.

PPI

The number of user-configurable PPI channels has increased from 16 to 20. The number of PPI groups has increased from 4 to 6. A new type of endpoint called FORK can be used to trigger an additional task from a single event endpoint.

PDM

The Pulse Density Modulation (PDM) peripheral is new in the nRF52 Series. This peripheral is designed so that it can filter two PDM signals and output it in PCM format (e.g. stereo sound). It supports EasyDMA for CPU offloading and can handle continuous audio streaming.

I2S

The Inter-IC Sound (I2S) peripheral is a new feature in the nRF52 Series. This peripheral is designed to interface with external audio circuitry, such as a codec or DSP. Most common derived formats are supported, including the original two-channel I2S format. EasyDMA is available for this peripheral to allow controlling the I2S slave from a low priority execution context.

MWU

The Memory Watch Unit (MWU) peripheral is a new feature in the nRF52 Series. This peripheral is designed to generate events when detecting accesses to SRAM or peripherals' memory segments. The events can be configured to trigger regular interrupts or a non-maskable interrupt (NMI). This feature may be used for run time protection of SRAM regions and peripherals, and help detect heap and stack overflows.

EGU

PWM

The Pulse Width Modulation (PWM) peripheral is a new feature in the nRF52 Series. There are three instances of the PWM in the nRF52 Series. Each instance features up to four channels and has EasyDMA capabilities for CPU offloading.

NVMC

A 2 kB direct mapped cache is a new feature in the nRF52 Series. The cache is disabled by default, but can be enabled through the NVMC ICACHECNF register. Cache profiling can be enabled in ICACHECNF, which will update cache profiling registers IHIT and IMISS. These registers increment on a cache hit or miss and can help in optimizing code for best performance.

UICR

New UICR configuration options in the nRF52 Series:

• PSELRESET - Programmable reset pin, the pin can be multiplexed to either GPIO or RESET.
• APPROTECT - Read-back protection mechanism.

Removed UICR configuration options in the nRF52 Series:

• RBPCONF - Replaced by APPROTECT.
• CLENR0 - Because the nRF51 style MPU is removed, this has been removed as well.
• XTALFREQ - 32 MHz crystal support only.
• FWID - Uses generic NRFFW registers.

FICR

Removed FICR configuration options in the nRF52 Series:

• CLENR0 - Because the MPU has been removed, this has been removed as well.
• PPFC - Replaced by APPROTECT in UICR.
• OVERRIDEEN - Not needed.
• NRF_1MBIT[x] - Not needed.
• BLE_1MBIT[x] - Not needed.