This anomaly applies to IC Rev. Engineering A, build codes QDAA-EA0.
Internal clock spurs appear in the TRX output.
The device is in the Receive state.
Some RX channels have degraded sensitivity of approximately 5 dB.
The internal charge pump (CP) clock source can be halted by toggling the CSN signal in the Receiver state. The CSN high period should be less than 20 ms, and the CSN low period should be 100 µs.
The workaround can be used in temperatures below +65°C.