Infineon I2C Protocol Stack Library

This information applies to the nRF52840 SoC only.

The Infineon I2C Protocol Stack library enables communication with Infineon OPTIGA Trust E products.

The protocol stack consists of three layers that relate to the ISO OSI (Open Systems Interconnection) model:

• Transport layer,
• Data link layer,
• Physical layer.

Beneath those is a host-specific hardware abstraction layer (HAL), which interfaces to the host's I2C driver or I2C peripheral.

Note

This documentation provides an informal overview of the Infineon I2C Protocol Stack. For more information, visit OPTIGA Trust E product website.

Stack Layers

This section presents an overview of the three stack layers: transport layer, data link layer, and physical layer.

Transport layer (TL)

The transport layer provides a single transceiver interface to send an application protocol data unit (APDU) to a device, and to subsequently retrieve the response APDU. The layer is responsible for chaining, i.e., fragmenting APDUs larger than the maximum packet size, and reassembling received packets back into APDUs.

Therefore, the TL provides a single transceive function to asynchronously send an APDU and receive the respective response APDU: ifx_i2c_tl_transceive().

The transport layer must be initialized by the higher layer using the ifx_i2c_tl_init() function.

Data Link Layer (DL)

The data link layer provides error correction on top of the physical layer's raw transmission facility.

Therefore, the DL provides two functions to asynchronously send and receive error-free data frames:

1. ifx_i2c_dl_send_frame()
2. ifx_i2c_dl_receive_frame()

The data link layer must be initialized by the higher layer using the ifx_i2c_dl_init() function.

Physical Layer (PL)

The physical layer provides two functions to asynchronously send and receive raw data frames:

1. ifx_i2c_pl_send_frame()
2. ifx_i2c_pl_receive_frame()

Internally, it accesses virtual registers on the Infineon OPTIGA Trust E device:

1. The DATA register is used to read from or write to the device.
2. The DATA_REG_LEN register holds the maximum data register length.
3. The I2C_STATE register provides the I2C state with regard to the features supported by the Infineon device; and whether the device is busy executing an operation or ready to return a response.

The physical layer is intended to be initialized by the higher layer using the ifx_i2c_pl_init() function.

Hardware Abstraction Layer (HAL)

The HAL separates hardware-specific APIs and module interfaces from the platform-independent implementation of the Infineon I2C Protocol Stack Library.

The nrf52-targeted HAL module can be found in ifx_i2c_hal_nordic_nrf.c. It uses the TWI transaction manager (app_twi) to interface to the I2C hardware.

In general, a proper HAL for the Infineon I2C Protocol Stack needs to implement four function sets:

1. To initialize the HAL module, ifx_i2c_init() must be implemented.
2. To I2C read and write from/to an I2C slave, ifx_i2c_transmit() and ifx_i2c_receive() must be implemented.
3. To use platform hardware timers, ifx_timer_setup() must be implemented. These timers are required for the transmit/receive functions on the physical layer so that asynchronous behavior can be implemented.
4. To enable logging functions to send log messages to the platform's logger, ifx_debug_log() must be implemented.

Configuration

The I2C library can be parameterized in the file ifx_i2c_config.h. The default configuration should already provide a reasonable starting point. The flags IFX_I2C_LOG_PL, IFX_I2C_LOG_DL, and IFX_I2C_LOG_TL turn logging on/off for the physical, data link, and transport layers.