S130 SDS v2.0: Processor usage patterns for the Radio Timeslot API

This section describes the processor availability and interrupt processing time for the SoftDevice when the Radio Timeslot API is being used.

See Radio Timeslot API for more information on the Radio Timeslot API.

Figure 1. Radio Timeslot API activity (some priority levels left out for clarity)

When using the Radio Timeslot API, the pattern of SoftDevice CPU activity at interrupt priority level 0 is as follows:

If the timeslot was requested with NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, there is first an interrupt that handles the startup of the high frequency crystal.
Then there are one or more radio timeslot activities. How many and how long these are, is application dependent.
When the last of the radio timeslot activities are finished, there is another interrupt at priority level 2 that does some cleanup after the Radio Timeslot operation.

SoftDevice processing activity in the different priority levels during use of Radio Timeslot API is outlined in the table below.

Table 1. Processor usage for the Radio Timeslot API
Parameter	Description	Typical	Max
t_{ISR(0),RadioTimeslotPrepare}	Interrupt processing when starting up the high frequency crystal.		21 μs
t_{ISR(0),RadioTimeslotActivity}	The application's processing in the timeslot. The length of this is application dependent.
t_ISR(2)	Priority level 2 interrupt at the end of the timeslot.	23 μs

Radio Timeslot API processor usage patterns