nRF5 SDK v13.0.0
Macros

Macro definitions for accessing ARM TrustZone CryptoCell register space. More...

Macros

#define SASI_REG_OFFSET(unit_name, reg_name)   (DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
 
#define SASI_REG_BIT_SHIFT(reg_name, field_name)   (DX_ ## reg_name ## _ ## field_name ## _BIT_SHIFT)
 
#define SASI_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val)
 
#define SASI2_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val)
 
#define SASI_REG_FLD_SET(unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val)
 
#define SASI2_REG_FLD_SET(unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val)
 

Detailed Description

Macro definitions for accessing ARM TrustZone CryptoCell register space.

Macro Definition Documentation

#define SASI2_REG_FLD_GET (   unit_name,
  reg_name,
  fld_name,
  reg_val 
)
Value:
(SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
reg_val /*!< \internal Optimization for 32b fields */ : \
BITFIELD_GET(reg_val, SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
#define SASI2_REG_FLD_SET (   unit_name,
  reg_name,
  fld_name,
  reg_shadow_var,
  new_fld_val 
)
Value:
do { \
if (SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
else \
BITFIELD_SET(reg_shadow_var, \
SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
new_fld_val); \
} while (0)
#define SASI_REG_FLD_GET (   unit_name,
  reg_name,
  fld_name,
  reg_val 
)
Value:
(DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
reg_val /*!< \internal Optimization for 32b fields */ : \
BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
#define SASI_REG_FLD_SET (   unit_name,
  reg_name,
  fld_name,
  reg_shadow_var,
  new_fld_val 
)
Value:
do { \
if (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
else \
BITFIELD_SET(reg_shadow_var, \
DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
new_fld_val); \
} while (0)

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