Radio Timeslot API processor usage patterns

This section describes the processor availability and interrupt processing time for the SoftDevice when the Radio Timeslot API is being used.

See Radio Timeslot API for more information on the Radio Timeslot API.

Figure 1. Radio Timeslot API activity (some priority levels left out for clarity)

When using the Radio Timeslot API, the pattern of SoftDevice CPU activity at interrupt priority level 0 is as follows:

SoftDevice processing activity in the different priority levels during use of Radio Timeslot API is outlined in the table below.

Table 1. Processor usage for the Radio Timeslot API
Parameter Description Min Typical Max
tISR(0),RadioTimeslotPrepare Interrupt processing when starting up the high frequency crystal.     9 μs
tISR(0),RadioTimeslotActivity The application's processing in the timeslot. The length of this is application dependent.      
tISR(4) Priority level 4 interrupt at the end of the timeslot.   7 μs  

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