EasyDMA

EasyDMA is an easy-to-use direct memory access module that some peripherals implement to gain direct access to Data RAM.

The EasyDMA is an AHB bus master similar to the CPU and it is connected to the AHB multilayer interconnect for direct access to the Data RAM. The EasyDMA is not able to access the flash.

A peripheral can implement multiple EasyDMA instances, for example to provide a dedicated channel for reading data from RAM into the peripheral at the same time as a second channel is dedicated for writing data to the RAM from the peripheral. This concept is illustrated in Figure 1

Figure 1. EasyDMA example

An EasyDMA channel is usually exposed to the user in the form illustrated below, but some variations may occur:

  
  READERBUFFER_SIZE 5
  WRITERBUFFER_SIZE 6

  uint8_t readerBuffer[READERBUFFER_SIZE]  __at__ 0x20000000;
  uint8_t writerBuffer[WRITERBUFFER_SIZE]  __at__ 0x20000005;

  // Configuring the READER channel
  MYPERIPHERAL->READER.MAXCNT = READERBUFFER_SIZE;  
  MYPERIPHERAL->READER.PTR = &readerBuffer;

  // Configure the WRITER channel
  MYPERIPHERAL->WRITER.MAXCNT = WRITEERBUFFER_SIZE;
  MYPERIPHERAL->WRITER.PTR = &writerBuffer;
  

This example shows a peripheral called MYPERIPHERAL that implements two EasyDMA channels, one for reading, called READER, and one for writing, called WRITER. When the peripheral is started, it is here assumed that the peripheral will read 5 bytes from the readerBuffer located in RAM at address 0x20000000, process the data and then write no more than 6 bytes back to the writerBuffer located in RAM at address 0x20000005. The memory layout of these buffers is illustrated in Figure 2.

Figure 2. EasyDMA memory layout

The EasyDMA channel's MAXCNT register cannot be specified larger than the actual size of the buffer. If, for example, the WRITER.MAXCNT register is specified larger than the size of the writerBuffer, the WRITER EasyDMA channel may overflow the writerBuffer.

After the peripheral has completed the EasyDMA transfer, the CPU can read the EasyDMA channel's AMOUNT register to see how many bytes that were transferred, e.g. it is possible for the CPU to read the MYPERIPHERAL->WRITER.AMOUNT register to see how many bytes the WRITER wrote to RAM.

EasyDMA array list

The EasyDMA is able to operate in a mode called array list.

The EasyDMA array list can be represented by the data structure ArrayList_type illustrated in the code example below.

This data structure includes only a buffer with size equal to READER.MAXCNT. EasyDMA will use the READER.MAXCNT register to determine when the buffer is full.

This array list does not provide a mechanism to explicitly specify where the next item in the list is located. Instead, it assumes that the list is organized as a linear array where items are located one after the other in RAM.

      
  #define BUFFER_SIZE  4

  typedef struct ArrayList
  {
    uint8_t buffer[BUFFER_SIZE];
  } ArrayList_type;

  ArrayList_type ReaderList[3];

  READER.MAXCNT = BUFFER_SIZE;
  READER.PTR = &ReaderList;
    
Figure 3. EasyDMA array list


Documentation feedback | Developer Zone | Updated 2016-12-05