Change log

See the following list for an overview of changes from previous versions of this document.

Version Date Change
nRF52832 Rev 1 v1.6 12.07.2017
  • Updated: No. 12. “Reference ladder is not correctly calibrated”
  • Updated: No. 66. “Linearity specification not met with default settings”
  • Updated: No. 79. “ A false EVENTS_FIELDDETECTED event occurs after the field is lost”
  • Added: No. 102. “PAYLOAD/END events delayed or not triggered after ADDRESS”
  • Added: No. 106. “Higher CRC error rates for some access addresses”
  • Added: No. 107. “Immediate address match for access addresses containing MSBs 0x00”
  • Added: No. 143. “False CRC failures on specific addresses”
  • Added: No. 149. “First clock pulse after clock stretching may be too long or too short”
  • Added: No. 155. “IN event may occur more than once on input edge”
  • Added: No. 156. “Some CLR tasks give unintentional behavior”
  • Added: No. 163. “Code and RAM size fields do not match chip specification”
nRF52832 Rev 1 v1.5 21.04.2017
  • Updated: No. 136. “Bits in RESETREAS are set when they should not be”
  • Added: No. 146. “LFRC frequency deviation”
  • Added: No. 150. “EVENT_STARTED does not fire”
nRF52832 Rev 1 v1.4 12.01.2017
  • Updated the attachment of No. 109. “DMA access transfers might be corrupted”
nRF52832 Rev 1 v1.3 16.12.2016
  • Added: No. 101. “Sleep current increases after soft reset”
  • Added: No. 109. “DMA access transfers might be corrupted”
  • Added: No. 113. “Single-ended mode with external reference is not functional”
  • Added: No. 132. “The LFRC oscillator might not start”
  • Added: No. 136. “Bits in RESETREAS are set when they should not be”
  • Added: No. 138. “Spurious emission on GPIO exceeds limits in radiated tests”
  • Added: No. 141. “HFCLK not stopped when entering SENSE mode”
nRF52832 Rev 1 v1.2 28.09.2016
  • Added: No. 108. “RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode”
nRF52832 Rev 1 v1.1 05.07.2016
  • Added: No. 84. “ISOURCE not functional”
  • Added: No. 86. “Triggering START task after offset calibration may write a sample to RAM”
  • Added: No. 87. “Unexpected wake from System ON Idle when using FPU”
  • Added: No. 88. “Increased current consumption when configured to pause in System ON idle”
  • Added: No. 89. “Static 400 µA current while using GPIOTE”
  • Added: No. 91. “ Radio performance using CSP package version”
  • Added: No. 97. “High current consumption in System ON Idle mode”
nRF52832 Rev 1 v1.0 17.02.2016
  • Added: No. 12. “Reference ladder is not correctly calibrated”
  • Added: No. 15. “RAM[x].POWERSET/CLR read as zero”
  • Added: No. 20. “Register values are invalid”
  • Added: No. 31. “Calibration values are not correctly loaded from FICR at reset”
  • Added: No. 36. “Some registers are not reset when expected”
  • Added: No. 51. “Aligned stereo slave mode does not work”
  • Added: No. 54. “Wrong LRCK polarity in Aligned mode”
  • Added: No. 55. “RXPTRUPD and TXPTRUPD events asserted after STOP”
  • Added: No. 58. “An additional byte is clocked out when RXD.MAXCNT = 1”
  • Added: No. 64. “Only full bytes can be received or transmitted, but supports 4-bit frame transmit”
  • Added: No. 66. “Linearity specification not met with default settings”
  • Added: No. 67. “Some events cannot be used with the PPI”
  • Added: No. 68. “EVENTS_HFCLKSTARTED can be generated before HFCLK is stable”
  • Added: No. 72. “TASKS_ACTIVATE cannot be used with the PPI”
  • Added: No. 74. “Started events fires prematurely”
  • Added: No. 75. “Increased current consumption”
  • Added: No. 76. “READY event is set sooner than it should”
  • Added: No. 77. “RC oscillator is not calibrated when first started”
  • Added: No. 78. “High current consumption when using timer STOP task only”
  • Added: No. 79. “ A false EVENTS_FIELDDETECTED event occurs after the field is lost”
  • Added: No. 81. “PIN_CNF is not retained when in debug interface mode”
  • Added: No. 83. “STOPPED event occurs twice if the STOP task is triggered during a transaction”