Fixed anomalies

The anomalies listed in this table are no longer present in the current chip version.

For a detailed description of the fixed anomalies, see the Errata for revision Engineering A.

Table 1. Fixed anomalies
ID Module Description
1 I2S I2S not functional
2 PWM PWM not functional
3 PDM PDM not functional
4 MWU MWU not functional
7 NVMC,System Cache is not functional
8 SAADC Increased current consumption in system ON-IDLE
9 QDEC Some features are not functional
10 RTC RTC2 is not functional
11 System Device is unable to stay in System OFF mode
16 System RAM may be corrupt on wakeup from CPU IDLE
17 NFCT The EVENTS_FIELDLOST is not generated
23 SPIM END event is generated before ENDTX
24 NFCT The FIELDPRESENT register read is not reliable
25 NFCT Reset value of SENSRES register is incorrect
26 NFCT NFC field does not wakeup the device from emulated system OFF
27 NFCT Triggering NFCT ACTIVATE task also activates the Rx easyDMA
28 SAADC Scan mode is not functional for some analog inputs
29 TWIS Incorrect bits in ERRORSRC
30 TWIS STOP Task is not functional
32 DIF Debug session automatically enables TracePort pins
33 System Code RAM is located at wrong address
34 System Code and Data RAM are not mapped from the same physical RAM
35 CLOCK HFCLK can draw current when not requested
37 RADIO Encryption engine is slow by default.
38 PPI Enable/disable tasks for channel group 4 and 5 cannot be triggered through PPI
39 NFCT The automatic collision resolution does not handle CRC and parity errors
40 NFCT The FRAMEDELAYMODE = WindowGrid is not supported
41 GPIO PIN_CNF[x] registers not reset after pin reset
42 PPI FORK on the fixed channels is not functional
43 SPIS SPIS0 is not functional
44 NVMC Read after flash erase is unpredictable
46 SPIM,TWIM EasyDMA list not functional
47 DIF Trace is not functional
48 DIF SWO only works if Trace is enabled.
49 RTC RTC is not functional after LFCLK is restarted
57 NFCT NFC Modulation amplitude
65 POWER RAM[] registers mapping of RAM block and sections is wrong

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