[34] System: Code and Data RAM are not mapped from the same physical RAM

This anomaly applies to IC Rev. Engineering A, build codes QFAA-AA0, QFAA-AC0, CGAA-AA0.

Symptoms

Only the first 32 kB of Data RAM or Code RAM are functional. The contents of Data and Code RAM are independent; values written to one cannot be read from the other.

Conditions

Always.

Workaround

Adjust your IDE/linkerscript/scatterfile to fit this memory model. 64 kB of RAM is available by defining 2 RAM block locations with 32 kB length:
  • Block 1: Base address = 0x2000 0000, length = 0x8000
  • Block 2: Base address = 0x0800 0000, length = 0x8000

All RAM can be used for data variables without limitation. If Code is run from the SRAM segment of the System Address Map (Data RAM), execution will take longer because wait states will be introduced. EasyDMA transfers to and from RAM must be performed in the SRAM segment of the System Address Map (Data RAM).

See ERRATA#33 – Code RAM is located at the wrong address.
Important: This workaround must not be used for unaffected devices.

Documentation feedback | Developer Zone | Subscribe | Updated 2016-07-05