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nRF5 Getting Started
  Available protocols
  Nordic tools and downloads
  Software development
  Hardware design
  Hardware testing
  Product certification
  Production programming and testing
  Available protocols
  Nordic tools and downloads
  Software development
  Hardware design
  Hardware testing
  Product certification
  Production programming and testing
nRF52 Series
  nRF52840
    Objective Product Specification
      Revision history
      About this document
        Document naming and status
        Peripheral naming and abbreviations
        Register tables
          Fields and values
         Registers
           DUMMY
      Block diagram
      Pin assignments
        QIAA pin assignments
      Absolute maximum ratings
      Recommended operating conditions
      CPU
        Floating point interrupt
         Electrical specification
           CPU performance
        CPU and support module configuration
      Memory
        RAM - Random access memory
        Flash - Non-volatile memory
        Memory map
         Instantiation
      AHB multilayer
      EasyDMA
        EasyDMA array list
      NVMC — Non-volatile memory controller
        Writing to flash
        Erasing a page in flash
        Writing to user information configuration registers (UICR)
        Erasing user information configuration registers (UICR)
        Erase all
        Cache
         Registers
           READY
           CONFIG
           ERASEPAGE
           ERASEPCR1 ( Deprecated )
           ERASEALL
           ERASEPCR0 ( Deprecated )
           ERASEUICR
           ICACHECNF
           IHIT
           IMISS
         Electrical specification
           Flash programming
           Cache size
      FICR — Factory information configuration registers
         Registers
           CODEPAGESIZE
           CODESIZE
           DEVICEID[0]
           DEVICEID[1]
           ER[0]
           ER[1]
           ER[2]
           ER[3]
           IR[0]
           IR[1]
           IR[2]
           IR[3]
           DEVICEADDRTYPE
           DEVICEADDR[0]
           DEVICEADDR[1]
           INFO.PART
           INFO.VARIANT
           INFO.PACKAGE
           INFO.RAM
           INFO.FLASH
           TEMP.A0
           TEMP.A1
           TEMP.A2
           TEMP.A3
           TEMP.A4
           TEMP.A5
           TEMP.B0
           TEMP.B1
           TEMP.B2
           TEMP.B3
           TEMP.B4
           TEMP.B5
           TEMP.T0
           TEMP.T1
           TEMP.T2
           TEMP.T3
           TEMP.T4
           NFC.TAGHEADER0
           NFC.TAGHEADER1
           NFC.TAGHEADER2
           NFC.TAGHEADER3
      UICR — User information configuration registers
         Registers
           NRFFW[0]
           NRFFW[1]
           NRFFW[2]
           NRFFW[3]
           NRFFW[4]
           NRFFW[5]
           NRFFW[6]
           NRFFW[7]
           NRFFW[8]
           NRFFW[9]
           NRFFW[10]
           NRFFW[11]
           NRFFW[12]
           NRFFW[13]
           NRFFW[14]
           NRFHW[0]
           NRFHW[1]
           NRFHW[2]
           NRFHW[3]
           NRFHW[4]
           NRFHW[5]
           NRFHW[6]
           NRFHW[7]
           NRFHW[8]
           NRFHW[9]
           NRFHW[10]
           NRFHW[11]
           CUSTOMER[0]
           CUSTOMER[1]
           CUSTOMER[2]
           CUSTOMER[3]
           CUSTOMER[4]
           CUSTOMER[5]
           CUSTOMER[6]
           CUSTOMER[7]
           CUSTOMER[8]
           CUSTOMER[9]
           CUSTOMER[10]
           CUSTOMER[11]
           CUSTOMER[12]
           CUSTOMER[13]
           CUSTOMER[14]
           CUSTOMER[15]
           CUSTOMER[16]
           CUSTOMER[17]
           CUSTOMER[18]
           CUSTOMER[19]
           CUSTOMER[20]
           CUSTOMER[21]
           CUSTOMER[22]
           CUSTOMER[23]
           CUSTOMER[24]
           CUSTOMER[25]
           CUSTOMER[26]
           CUSTOMER[27]
           CUSTOMER[28]
           CUSTOMER[29]
           CUSTOMER[30]
           CUSTOMER[31]
           PSELRESET[0]
           PSELRESET[1]
           APPROTECT
           NFCPINS
           DEBUGCTRL
           EXTSUPPLY
           REGOUT0
      Peripheral interface
        Peripheral ID
        Peripherals with shared ID
        Peripheral registers
        Bit set and clear
        Tasks
        Events
        Shortcuts
        Interrupts
      Debug and trace
        DAP - Debug access port
        CTRL-AP - Control access port
           Registers
             RESET
             ERASEALL
             ERASEALLSTATUS
             APPROTECTSTATUS
             IDR
           Electrical specification
             Control access port
        Debug interface mode
        Real-time debug
        Trace
           Electrical specification
             Trace port
      POWER — Power supply
        Main supply
          Main voltage regulators
          GPIO levels
          External circuitry supply
          Regulator configuration examples
          Power supply supervisor
          Power-fail comparator
        USB supply
        System OFF mode
          Emulated System OFF mode
        System ON mode
          Sub power modes
        RAM power control
        Reset
          Power-on reset
          Pin reset
          Wakeup from System OFF mode reset
          Soft reset
          Watchdog reset
          Brownout reset
        Retained registers
        Reset behavior
         Registers
           INTENSET
           INTENCLR
           RESETREAS
           RAMSTATUS ( Deprecated )
           USBREGSTATUS
           SYSTEMOFF
           POFCON
           GPREGRET
           GPREGRET2
           DCDCEN
           DCDCEN0
           MAINREGSTATUS
           RAM[0].POWER
           RAM[0].POWERSET
           RAM[0].POWERCLR
           RAM[1].POWER
           RAM[1].POWERSET
           RAM[1].POWERCLR
           RAM[2].POWER
           RAM[2].POWERSET
           RAM[2].POWERCLR
           RAM[3].POWER
           RAM[3].POWERSET
           RAM[3].POWERCLR
           RAM[4].POWER
           RAM[4].POWERSET
           RAM[4].POWERCLR
           RAM[5].POWER
           RAM[5].POWERSET
           RAM[5].POWERCLR
           RAM[6].POWER
           RAM[6].POWERSET
           RAM[6].POWERCLR
           RAM[7].POWER
           RAM[7].POWERSET
           RAM[7].POWERCLR
           RAM[8].POWER
           RAM[8].POWERSET
           RAM[8].POWERCLR
         Electrical specification
           Regulator operating conditions
           Current consumption, sleep
           Device startup times
           Power fail comparator
           USB operating conditions
           USB regulator specifications
           VBUS detection specifications
      CLOCK — Clock control
        HFCLK clock controller
          64 MHz crystal oscillator (HFXO)
        LFCLK clock controller
          32.768 kHz RC oscillator (LFRC)
          Calibrating the 32.768 kHz RC oscillator
          Calibration timer
          32.768 kHz crystal oscillator (LFXO)
          32.768 kHz synthesized from HFCLK (LFSYNT)
         Registers
           INTENSET
           INTENCLR
           HFCLKRUN
           HFCLKSTAT
           LFCLKRUN
           LFCLKSTAT
           LFCLKSRCCOPY
           LFCLKSRC
           HFXODEBOUNCE
           CTIV ( Retained )
           TRACECONFIG
           LFRCMODE
         Electrical specification
           64 MHz internal oscillator (HFINT)
           64 MHz crystal oscillator (HFXO)
           Low frequency crystal oscillator (LFXO)
           Low frequency RC oscillator (LFRC), Normal mode
           Low frequency RC oscillator (LFRC), Ultra-low power mode (ULP)
           Synthesized low frequency clock (LFSYNT)
      Power and clock management
        Current consumption scenarios
           Electrical specification
             Current consumption: Radio
             Current consumption: Radio protocol configurations
             Current consumption: Ultra-low power
             Current consumption: Serial interfaces
             Current consumption: CPU
      GPIO — General purpose input/output
        Pin configuration
        GPIO located near the RADIO
         Registers
           OUT
           OUTSET
           OUTCLR
           IN
           DIR
           DIRSET
           DIRCLR
           LATCH
           DETECTMODE
           PIN_CNF[0]
           PIN_CNF[1]
           PIN_CNF[2]
           PIN_CNF[3]
           PIN_CNF[4]
           PIN_CNF[5]
           PIN_CNF[6]
           PIN_CNF[7]
           PIN_CNF[8]
           PIN_CNF[9]
           PIN_CNF[10]
           PIN_CNF[11]
           PIN_CNF[12]
           PIN_CNF[13]
           PIN_CNF[14]
           PIN_CNF[15]
           PIN_CNF[16]
           PIN_CNF[17]
           PIN_CNF[18]
           PIN_CNF[19]
           PIN_CNF[20]
           PIN_CNF[21]
           PIN_CNF[22]
           PIN_CNF[23]
           PIN_CNF[24]
           PIN_CNF[25]
           PIN_CNF[26]
           PIN_CNF[27]
           PIN_CNF[28]
           PIN_CNF[29]
           PIN_CNF[30]
           PIN_CNF[31]
         Electrical specification
           GPIO Electrical Specification
      GPIOTE — GPIO tasks and events
        Pin events and tasks
        Port event
        Tasks and events pin configuration
         Registers
           INTENSET
           INTENCLR
           CONFIG[0]
           CONFIG[1]
           CONFIG[2]
           CONFIG[3]
           CONFIG[4]
           CONFIG[5]
           CONFIG[6]
           CONFIG[7]
         Electrical specification
           GPIOTE Electrical Specification
      PPI — Programmable peripheral interconnect
        Pre-programmed channels
         Registers
           CHEN
           CHENSET
           CHENCLR
           CH[0].EEP
           CH[0].TEP
           CH[1].EEP
           CH[1].TEP
           CH[2].EEP
           CH[2].TEP
           CH[3].EEP
           CH[3].TEP
           CH[4].EEP
           CH[4].TEP
           CH[5].EEP
           CH[5].TEP
           CH[6].EEP
           CH[6].TEP
           CH[7].EEP
           CH[7].TEP
           CH[8].EEP
           CH[8].TEP
           CH[9].EEP
           CH[9].TEP
           CH[10].EEP
           CH[10].TEP
           CH[11].EEP
           CH[11].TEP
           CH[12].EEP
           CH[12].TEP
           CH[13].EEP
           CH[13].TEP
           CH[14].EEP
           CH[14].TEP
           CH[15].EEP
           CH[15].TEP
           CH[16].EEP
           CH[16].TEP
           CH[17].EEP
           CH[17].TEP
           CH[18].EEP
           CH[18].TEP
           CH[19].EEP
           CH[19].TEP
           CHG[0]
           CHG[1]
           CHG[2]
           CHG[3]
           CHG[4]
           CHG[5]
           FORK[0].TEP
           FORK[1].TEP
           FORK[2].TEP
           FORK[3].TEP
           FORK[4].TEP
           FORK[5].TEP
           FORK[6].TEP
           FORK[7].TEP
           FORK[8].TEP
           FORK[9].TEP
           FORK[10].TEP
           FORK[11].TEP
           FORK[12].TEP
           FORK[13].TEP
           FORK[14].TEP
           FORK[15].TEP
           FORK[16].TEP
           FORK[17].TEP
           FORK[18].TEP
           FORK[19].TEP
           FORK[20].TEP
           FORK[21].TEP
           FORK[22].TEP
           FORK[23].TEP
           FORK[24].TEP
           FORK[25].TEP
           FORK[26].TEP
           FORK[27].TEP
           FORK[28].TEP
           FORK[29].TEP
           FORK[30].TEP
           FORK[31].TEP
      RADIO — 2.4 GHz Radio
        Packet configuration
        Address configuration
        Data whitening
        CRC
        Radio states
        Transmit sequence
        Receive sequence
        Received Signal Strength Indicator (RSSI)
        Interframe spacing
        Device address match
        Bit counter
        IEEE 802.15.4 Operation
          Packet Structure
          Operating Frequencies
          Energy Detection
          Clear Channel Assessment
          Cyclic Redundancy Check
          Transmit Sequence
          Receive Sequence
          Interframe Spacing
        EasyDMA
         Registers
           SHORTS
           INTENSET
           INTENCLR
           CRCSTATUS
           RXMATCH
           RXCRC
           DAI
           PDUSTAT
           PACKETPTR
           FREQUENCY
           TXPOWER
           MODE
           PCNF0
           PCNF1
           BASE0
           BASE1
           PREFIX0
           PREFIX1
           TXADDRESS
           RXADDRESSES
           CRCCNF
           CRCPOLY
           CRCINIT
           TIFS
           RSSISAMPLE
           STATE
           DATAWHITEIV
           BCC
           DAB[0]
           DAB[1]
           DAB[2]
           DAB[3]
           DAB[4]
           DAB[5]
           DAB[6]
           DAB[7]
           DAP[0]
           DAP[1]
           DAP[2]
           DAP[3]
           DAP[4]
           DAP[5]
           DAP[6]
           DAP[7]
           DACNF
           MHRMATCHCONF
           MHRMATCHMAS
           MODECNF0
           SFD
           EDCNT
           EDSAMPLE
           CCACTRL
           POWER
         Electrical specification
           General Radio Characteristics
           Radio current consumption (Transmitter)
           Radio current consumption (Receiver)
           Transmitter specification
           Receiver operation
           RX selectivity
           RX intermodulation
           Radio timing
           Received Signal Strength Indicator (RSSI) specifications
           Jitter
           Delay when disabling the RADIO
      TIMER — Timer/counter
        Capture
        Compare
        Task delays
        Task priority
         Registers
           SHORTS
           INTENSET
           INTENCLR
           STATUS
           MODE
           BITMODE
           PRESCALER
           CC[0]
           CC[1]
           CC[2]
           CC[3]
           CC[4]
           CC[5]
         Electrical specification
           Timers Electrical Specification
      RTC — Real-time counter
        Clock source
        Resolution versus overflow and the PRESCALER
        COUNTER register
        Overflow features
        TICK event
        Event control feature
        Compare feature
        TASK and EVENT jitter/delay
        Reading the COUNTER register
         Registers
           INTENSET
           INTENCLR
           EVTEN
           EVTENSET
           EVTENCLR
           COUNTER
           PRESCALER
           CC[0]
           CC[1]
           CC[2]
           CC[3]
         Electrical specification
           RTC Electrical Specification
      RNG — Random number generator
        Bias correction
        Speed
         Registers
           SHORTS
           INTENSET
           INTENCLR
           CONFIG
           VALUE
         Electrical specification
           RNG Electrical Specification
      TEMP — Temperature sensor
         Registers
           INTENSET
           INTENCLR
           TEMP
           A0
           A1
           A2
           A3
           A4
           A5
           B0
           B1
           B2
           B3
           B4
           B5
           T0
           T1
           T2
           T3
           T4
         Electrical specification
           Temperature Sensor Electrical Specification
      ECB — AES electronic codebook mode encryption
        Shared resources
        EasyDMA
        ECB data structure
         Registers
           INTENSET
           INTENCLR
           ECBDATAPTR
         Electrical specification
           ECB Electrical Specification
      CCM — AES CCM mode encryption
        Shared resources
        Key-steam generation
        Encryption
        Decryption
        AES CCM and RADIO concurrent operation
        Encrypting packets on-the-fly in radio transmit mode
        Decrypting packets on-the-fly in radio receive mode
        CCM data structure
        EasyDMA and ERROR event
         Registers
           SHORTS
           INTENSET
           INTENCLR
           MICSTATUS
           ENABLE
           MODE
           CNFPTR
           INPTR
           OUTPTR
           SCRATCHPTR
           MAXPACKETSIZE
           RATEOVERRIDE
         Electrical specification
           Timing specification
      AAR — Accelerated address resolver
        Shared resources
        EasyDMA
        Resolving a resolvable address
        Use case example for chaining RADIO packet reception with address resolution using AAR
        IRK data structure
         Registers
           INTENSET
           INTENCLR
           STATUS
           ENABLE
           NIRK
           IRKPTR
           ADDRPTR
           SCRATCHPTR
         Electrical specification
           AAR Electrical Specification
      SPIM — Serial peripheral interface master with EasyDMA
        SPI master transaction sequence
        D/CX functionality
        Pin configuration
        Shared resources
        EasyDMA
          EasyDMA list
            EasyDMA array list
        Low power
         Registers
           SHORTS
           INTENSET
           INTENCLR
           STALLSTAT
           ENABLE
           PSEL.SCK
           PSEL.MOSI
           PSEL.MISO
           PSEL.CSN
           FREQUENCY
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           RXD.LIST
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           TXD.LIST
           CONFIG
           IFTIMING.RXDELAY
           IFTIMING.CSNDUR
           CSNPOL
           PSELDCX
           DCXCNT
           ORC
         Electrical specification
           Current consumption
           Timing specifications
      SPIS — Serial peripheral interface slave with EasyDMA
        Shared resources
        EasyDMA
        SPI slave operation
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           SEMSTAT
           STATUS
           ENABLE
           PSELSCK ( Deprecated )
           PSELMISO ( Deprecated )
           PSELMOSI ( Deprecated )
           PSELCSN ( Deprecated )
           PSEL.SCK
           PSEL.MISO
           PSEL.MOSI
           PSEL.CSN
           RXDPTR ( Deprecated )
           MAXRX ( Deprecated )
           AMOUNTRX ( Deprecated )
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXDPTR ( Deprecated )
           MAXTX ( Deprecated )
           AMOUNTTX ( Deprecated )
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           CONFIG
           DEF
           ORC
         Electrical specification
           SPIS slave interface electrical specifications
           Serial Peripheral Interface Slave (SPIS) timing specifications
      TWIM — I2C compatible two-wire interface master with EasyDMA
        Shared resources
        EasyDMA
        Master write sequence
        Master read sequence
        Master repeated start sequence
        Low power
        Master mode pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.SCL
           PSEL.SDA
           FREQUENCY
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           RXD.LIST
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           TXD.LIST
           ADDRESS
         Electrical specification
           TWIM interface electrical specifications
           Two Wire Interface Master (TWIM) timing specifications
        Pullup resistor
      TWIS — I2C compatible two-wire interface slave with EasyDMA
        Shared resources
        EasyDMA
        TWI slave responding to a read command
        TWI slave responding to a write command
        Master repeated start sequence
        Terminating an ongoing TWI transaction
        Low power
        Slave mode pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           MATCH
           ENABLE
           PSEL.SCL
           PSEL.SDA
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           ADDRESS[0]
           ADDRESS[1]
           CONFIG
           ORC
         Electrical specification
           TWIS slave interface electrical specifications
           TWIS slave timing specifications
      UARTE — Universal asynchronous receiver/transmitter with EasyDMA
        Shared resources
        EasyDMA
        Transmission
        Reception
        Error conditions
        Using the UARTE without flow control
        Parity and stop bit configuration
        Low power
        Pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.RTS
           PSEL.TXD
           PSEL.CTS
           PSEL.RXD
           BAUDRATE
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           CONFIG
         Electrical specification
           UARTE electrical specification
      QDEC — Quadrature decoder
        Sampling and decoding
        LED output
        Debounce filters
        Accumulators
        Output/input pins
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ENABLE
           LEDPOL
           SAMPLEPER
           SAMPLE
           REPORTPER
           ACC
           ACCREAD
           PSEL.LED
           PSEL.A
           PSEL.B
           DBFEN
           LEDPRE
           ACCDBL
           ACCDBLREAD
         Electrical specification
           QDEC Electrical Specification
      SAADC — Successive approximation analog-to-digital converter
        Shared resources
        Overview
        Digital output
        Analog inputs and channels
        Operation modes
          One-shot mode
          Continuous mode
          Oversampling
          Scan mode
        EasyDMA
        Resistor ladder
        Reference
        Acquisition time
        Limits event monitoring
         Registers
           INTEN
           INTENSET
           INTENCLR
           STATUS
           ENABLE
           CH[0].PSELP
           CH[0].PSELN
           CH[0].CONFIG
           CH[0].LIMIT
           CH[1].PSELP
           CH[1].PSELN
           CH[1].CONFIG
           CH[1].LIMIT
           CH[2].PSELP
           CH[2].PSELN
           CH[2].CONFIG
           CH[2].LIMIT
           CH[3].PSELP
           CH[3].PSELN
           CH[3].CONFIG
           CH[3].LIMIT
           CH[4].PSELP
           CH[4].PSELN
           CH[4].CONFIG
           CH[4].LIMIT
           CH[5].PSELP
           CH[5].PSELN
           CH[5].CONFIG
           CH[5].LIMIT
           CH[6].PSELP
           CH[6].PSELN
           CH[6].CONFIG
           CH[6].LIMIT
           CH[7].PSELP
           CH[7].PSELN
           CH[7].CONFIG
           CH[7].LIMIT
           RESOLUTION
           OVERSAMPLE
           SAMPLERATE
           RESULT.PTR
           RESULT.MAXCNT
           RESULT.AMOUNT
         Electrical specification
           SAADC Electrical Specification
        Performance factors
      COMP — Comparator
        Differential mode
        Single-ended mode
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           RESULT
           ENABLE
           PSEL
           REFSEL
           EXTREFSEL
           TH
           MODE
           HYST
         Electrical specification
           COMP Electrical Specification
      LPCOMP — Low power comparator
        Shared resources
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           RESULT
           ENABLE
           PSEL
           REFSEL
           EXTREFSEL
           ANADETECT
           HYST
         Electrical specification
           LPCOMP Electrical Specification
      WDT — Watchdog timer
        Reload criteria
        Temporarily pausing the watchdog
        Watchdog reset
         Registers
           INTENSET
           INTENCLR
           RUNSTATUS
           REQSTATUS
           CRV
           RREN
           CONFIG
           RR[0]
           RR[1]
           RR[2]
           RR[3]
           RR[4]
           RR[5]
           RR[6]
           RR[7]
         Electrical specification
           Watchdog Timer Electrical Specification
      SWI — Software interrupts
         Registers
      NFCT — Near field communication tag
        Overview
        Operating states
        Pin configuration
        EasyDMA
        Frame assembler
        Frame disassembler
        Frame timing controller
        Collision resolution
        Antenna interface
        NFCT antenna recommendations
        Battery protection
         References
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSTATUS
           FRAMESTATUS.RX
           NFCTAGSTATE
           FIELDPRESENT
           FRAMEDELAYMIN
           FRAMEDELAYMAX
           FRAMEDELAYMODE
           PACKETPTR
           MAXLEN
           TXD.FRAMECONFIG
           TXD.AMOUNT
           RXD.FRAMECONFIG
           RXD.AMOUNT
           NFCID1_LAST
           NFCID1_2ND_LAST
           NFCID1_3RD_LAST
           AUTOCOLRESCONFIG
           SENSRES
           SELRES
         Electrical specification
           NFCT Electrical Specification
           NFCT Timing Parameters
      PDM — Pulse density modulation interface
        Master clock generator
        Module operation
        Decimation filter
        EasyDMA
        Hardware example
        Pin configuration
         Registers
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           PDMCLKCTRL
           MODE
           GAINL
           GAINR
           RATIO
           PSEL.CLK
           PSEL.DIN
           SAMPLE.PTR
           SAMPLE.MAXCNT
         Electrical specification
           PDM Electrical Specification
      I2S — Inter-IC sound interface
        Mode
        Transmitting and receiving
        Left right clock (LRCK)
        Serial clock (SCK)
        Master clock (MCK)
        Width, alignment and format
        EasyDMA
        Module operation
        Pin configuration
         Registers
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           CONFIG.MODE
           CONFIG.RXEN
           CONFIG.TXEN
           CONFIG.MCKEN
           CONFIG.MCKFREQ
           CONFIG.RATIO
           CONFIG.SWIDTH
           CONFIG.ALIGN
           CONFIG.FORMAT
           CONFIG.CHANNELS
           RXD.PTR
           TXD.PTR
           RXTXD.MAXCNT
           PSEL.MCK
           PSEL.SCK
           PSEL.LRCK
           PSEL.SDIN
           PSEL.SDOUT
         Electrical specification
           I2S timing specification
      MWU — Memory watch unit
         Registers
           INTEN
           INTENSET
           INTENCLR
           NMIEN
           NMIENSET
           NMIENCLR
           PERREGION[0].SUBSTATWA
           PERREGION[0].SUBSTATRA
           PERREGION[1].SUBSTATWA
           PERREGION[1].SUBSTATRA
           REGIONEN
           REGIONENSET
           REGIONENCLR
           REGION[0].START
           REGION[0].END
           REGION[1].START
           REGION[1].END
           REGION[2].START
           REGION[2].END
           REGION[3].START
           REGION[3].END
           PREGION[0].START
           PREGION[0].END
           PREGION[0].SUBS
           PREGION[1].START
           PREGION[1].END
           PREGION[1].SUBS
      EGU — Event generator unit
         Registers
           INTEN
           INTENSET
           INTENCLR
         Electrical specification
           EGU Electrical Specification
      PWM — Pulse width modulation
        Wave counter
        Decoder with EasyDMA
        Limitations
        Pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           MODE
           COUNTERTOP
           PRESCALER
           DECODER
           LOOP
           SEQ[0].PTR
           SEQ[0].CNT
           SEQ[0].REFRESH
           SEQ[0].ENDDELAY
           SEQ[1].PTR
           SEQ[1].CNT
           SEQ[1].REFRESH
           SEQ[1].ENDDELAY
           PSEL.OUT[0]
           PSEL.OUT[1]
           PSEL.OUT[2]
           PSEL.OUT[3]
         Electrical specification
           PWM Electrical Specification
      SPI — Serial peripheral interface master
        Functional description
          SPI master mode pin configuration
          Shared resources
          SPI master transaction sequence
         Registers
           INTENSET
           INTENCLR
           ENABLE
           PSEL.SCK
           PSEL.MOSI
           PSEL.MISO
           RXD
           TXD
           FREQUENCY
           CONFIG
         Electrical specification
           SPI master interface electrical specifications
           Serial Peripheral Interface (SPI) Master timing specifications
      TWI — I2C compatible two-wire interface
        Functional description
        Master mode pin configuration
        Shared resources
        Master write sequence
        Master read sequence
        Master repeated start sequence
        Low power
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.SCL
           PSEL.SDA
           RXD
           TXD
           FREQUENCY
           ADDRESS
         Electrical specification
           TWI interface electrical specifications
           Two Wire Interface (TWI) timing specifications
      UART — Universal asynchronous receiver/transmitter
        Functional description
        Pin configuration
        Shared resources
        Transmission
        Reception
        Suspending the UART
        Error conditions
        Using the UART without flow control
        Parity configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.RTS
           PSEL.TXD
           PSEL.CTS
           PSEL.RXD
           RXD
           TXD
           BAUDRATE
           CONFIG
         Electrical specification
           UART electrical specification
      ACL — Access control lists
         Registers
           ACL[0].ADDR
           ACL[0].SIZE
           ACL[0].PERM
           ACL[1].ADDR
           ACL[1].SIZE
           ACL[1].PERM
           ACL[2].ADDR
           ACL[2].SIZE
           ACL[2].PERM
           ACL[3].ADDR
           ACL[3].SIZE
           ACL[3].PERM
           ACL[4].ADDR
           ACL[4].SIZE
           ACL[4].PERM
           ACL[5].ADDR
           ACL[5].SIZE
           ACL[5].PERM
           ACL[6].ADDR
           ACL[6].SIZE
           ACL[6].PERM
           ACL[7].ADDR
           ACL[7].SIZE
           ACL[7].PERM
      USBD — Universal serial bus device
        USB device states
        USB terminology
        USB pins
        USBD start-up sequence
        USB pull-up
        USB reset
        USB suspend and resume
          Entering suspend
          Host-initiated resume
          Device-initiated remote wake-up
        EasyDMA
        Control transfers
          Control Read transfer
          Control Write transfer
        Bulk and interrupt transactions
          Bulk and interrupt IN transaction
          Bulk and interrupt OUT transaction
        Isochronous transactions
          Isochronous IN transaction
          Isochronous OUT transaction
        USB register access limitations
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           EVENTCAUSE
           BUSSTATE
           HALTED.EPIN[0]
           HALTED.EPIN[1]
           HALTED.EPIN[2]
           HALTED.EPIN[3]
           HALTED.EPIN[4]
           HALTED.EPIN[5]
           HALTED.EPIN[6]
           HALTED.EPIN[7]
           HALTED.EPOUT[0]
           HALTED.EPOUT[1]
           HALTED.EPOUT[2]
           HALTED.EPOUT[3]
           HALTED.EPOUT[4]
           HALTED.EPOUT[5]
           HALTED.EPOUT[6]
           HALTED.EPOUT[7]
           EPSTATUS
           EPDATASTATUS
           USBADDR
           BMREQUESTTYPE
           BREQUEST
           WVALUEL
           WVALUEH
           WINDEXL
           WINDEXH
           WLENGTHL
           WLENGTHH
           SIZE.EPOUT[0]
           SIZE.EPOUT[1]
           SIZE.EPOUT[2]
           SIZE.EPOUT[3]
           SIZE.EPOUT[4]
           SIZE.EPOUT[5]
           SIZE.EPOUT[6]
           SIZE.EPOUT[7]
           SIZE.ISOOUT
           ENABLE
           USBPULLUP
           DPDMVALUE
           DTOGGLE
           EPINEN
           EPOUTEN
           EPSTALL
           ISOSPLIT
           FRAMECNTR
           LOWPOWER
           ISOINCONFIG
           EPIN[0].PTR
           EPIN[0].MAXCNT
           EPIN[0].AMOUNT
           EPIN[1].PTR
           EPIN[1].MAXCNT
           EPIN[1].AMOUNT
           EPIN[2].PTR
           EPIN[2].MAXCNT
           EPIN[2].AMOUNT
           EPIN[3].PTR
           EPIN[3].MAXCNT
           EPIN[3].AMOUNT
           EPIN[4].PTR
           EPIN[4].MAXCNT
           EPIN[4].AMOUNT
           EPIN[5].PTR
           EPIN[5].MAXCNT
           EPIN[5].AMOUNT
           EPIN[6].PTR
           EPIN[6].MAXCNT
           EPIN[6].AMOUNT
           EPIN[7].PTR
           EPIN[7].MAXCNT
           EPIN[7].AMOUNT
           ISOIN.PTR
           ISOIN.MAXCNT
           ISOIN.AMOUNT
           EPOUT[0].PTR
           EPOUT[0].MAXCNT
           EPOUT[0].AMOUNT
           EPOUT[1].PTR
           EPOUT[1].MAXCNT
           EPOUT[1].AMOUNT
           EPOUT[2].PTR
           EPOUT[2].MAXCNT
           EPOUT[2].AMOUNT
           EPOUT[3].PTR
           EPOUT[3].MAXCNT
           EPOUT[3].AMOUNT
           EPOUT[4].PTR
           EPOUT[4].MAXCNT
           EPOUT[4].AMOUNT
           EPOUT[5].PTR
           EPOUT[5].MAXCNT
           EPOUT[5].AMOUNT
           EPOUT[6].PTR
           EPOUT[6].MAXCNT
           EPOUT[6].AMOUNT
           EPOUT[7].PTR
           EPOUT[7].MAXCNT
           EPOUT[7].AMOUNT
           ISOOUT.PTR
           ISOOUT.MAXCNT
           ISOOUT.AMOUNT
         Electrical specification
           USB Electrical Specification
      QSPI — Quad serial peripheral interface
        Configuring peripheral
        Write operation
        Read operation
        Erase operation
        Execute in place
        Sending custom instructions
          Long frame mode
        Deep power-down mode
        Instruction set
        Interface description
         Registers
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           READ.SRC
           READ.DST
           READ.CNT
           WRITE.DST
           WRITE.SRC
           WRITE.CNT
           ERASE.PTR
           ERASE.LEN
           PSEL.SCK
           PSEL.CSN
           PSEL.IO0
           PSEL.IO1
           PSEL.IO2
           PSEL.IO3
           XIPOFFSET
           IFCONFIG0
           IFCONFIG1
           STATUS
           DPMDUR
           ADDRCONF
           CINSTRCONF
           CINSTRDAT0
           CINSTRDAT1
           IFTIMING
         Electrical specification
           Current consumption
           Timing specification
      CRYPTOCELL — ARM TrustZone CryptoCell 310
        Standards
        Control interface
           Registers
             ENABLE
           Electrical specification
             ARM TrustZone CryptoCell 310 Electrical Specification
      Mechanical specifications
        AQFN73 7 x 7 mm package
      Ordering information
        Package marking
        Box labels
        Order code
        Code ranges and values
        Product options
      Reference circuitry
        Circuit configuration no. 1
        Circuit configuration no. 2
        Circuit configuration no. 3
        Circuit configuration no. 4
        Circuit configuration no. 5
        Circuit configuration no. 6
        PCB guidelines
        PCB layout example
      Liability disclaimer
        RoHS and REACH statement
        Life support applications
    Errata
      nRF52840 Engineering B Errata
        Change log
        New and inherited anomalies
          [20] RTC: Register values are invalid
          [36] CLOCK: Some registers are not reset when expected
          [55] I2S: RXPTRUPD and TXPTRUPD events asserted after STOP
          [66] TEMP: Linearity specification not met with default settings
          [78] TIMER: High current consumption when using timer STOP task only
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [94] USBD: BUSSTATE register is not functional
          [136] System: Bits in RESETREAS are set when they should not be
          [153] RADIO: RSSI parameter adjustment
          [155] GPIOTE: IN event may occur more than once on input edge
          [166] USBD: ISO double buffering not functional
          [170] I2S: NRF_I2S->PSEL CONNECT fields are not readable
          [171] USB,USBD: USB might not power up
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [174] SPIM: SPIM3 events incorrectly connected to the PPI
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [183] PWM: False SEQEND[0] and SEQEND[1] events
          [184] NVMC: Erase or write operations from the external debugger fail when CPU is not halted
          [186] POWER: High current consumption in System ON Idle, using High Voltage mode
          [187] USBD: USB cannot be enabled
        Fixed anomalies
      nRF52840 Engineering A Errata
        Change log
        New and inherited anomalies
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [36] CLOCK: Some registers are not reset when expected
          [54] I2S: Wrong LRCK polarity in Aligned mode
          [55] I2S: RXPTRUPD and TXPTRUPD events asserted after STOP
          [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1
          [66] TEMP: Linearity specification not met with default settings
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [78] TIMER: High current consumption when using timer STOP task only
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [89] TWI: Static 400 µA current while using GPIOTE
          [94] USBD: BUSSTATE register is not functional
          [96] I2S: DMA buffers can only be located in the first 64 kB of data RAM
          [97] GPIOTE: High current consumption in System ON Idle mode
          [98] NFCT: Not able to communicate with the peer
          [103] CCM: Reset value of CCM.MAXPACKETSIZE causes encryption, decryption, and MIC failures
          [104] USBD: EPDATA event is not always generated
          [110] RADIO: Packet loss or degraded sensitivity
          [111] RAM: Retention in OFF mode is not controlled by RAM[n].POWER->SxRETENTION, but by RAM[n].POWER->SxPOWER
          [112] RADIO: False SFD field matches in IEEE 802.15.4 mode RX
          [113] COMP: Single-ended mode with external reference is not functional
          [115] RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode
          [116] NFCT: HFCLK not stopped when entering into SENSE_FIELD state
          [117] System: Reading address 0x40029618 blocks the device
          [118] QSPI: Reading halfwords or bytes from the XIP region is not supported
          [119] POWER: Wake up from System OFF on VBUS detect is not functional
          [121] QSPI: Second read and long read commands fail
          [122] QSPI: QSPI uses current after being disabled
          [127] UARTE: Two stop bit setting is not functional
          [128] PDM: RATIO register is not functional
          [131] UARTE: EasyDMA transfer size is limited to 255 bytes
          [133] CLOCK,RADIO: NRF_RADIO->EVENTS_BCMATCH event might trigger twice
          [134] USBD: ISOINCONFIG register is not functional
          [135] USBD: SIZE.ISOOUT register does not report empty incoming packets
          [136] System: Bits in RESETREAS are set when they should not be
          [140] POWER: REG0 External circuitry supply in LDO mode is not functional in System ON IDLE
          [142] RADIO: Sensitivity not according to specification
          [143] RADIO: False CRC failures on specific addresses
          [144] NFCT: Not optimal NFC performance
          [145] SPIM: SPIM3 not functional
          [147] CLOCK: LFRC ULP mode not calibrated in production
          [150] SAADC: EVENT_STARTED does not fire
          [151] NVMC: Access to protected memory through Cache
          [153] RADIO: RSSI parameter adjustment
          [155] GPIOTE: IN event may occur more than once on input edge
          [156] GPIOTE: Some CLR tasks give unintentional behavior
          [158] RADIO: High power consumption in DISABLED state
          [160] SAADC: VDDHDIV5 not functional
          [164] RADIO: Low sensitivity in long range mode
          [166] USBD: ISO double buffering not functional
          [170] I2S: NRF_I2S->PSEL CONNECT fields are not readable
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [180] USBD: Wrong PLL calibration in production
          [181] NFCT: Invalid value in FICR for double-size NFCID1
          [183] PWM: False SEQEND[0] and SEQEND[1] events
          [184] NVMC: Erase or write operations from the external debugger fail when CPU is not halted
    Compatibility Matrix
      IC revision overview
      Documentation and reference design files overview
      IC revisions, SDK, and SoftDevice compatibility matrix
      IC revisions compatibility with development HW
      Revision history
    nRF52840 Preview Development Kit
      Revision history
      Setting up the development kit
      Software tools
      Start developing
      Interface MCU
        IF Boot/Reset button
        Virtual COM port
          Dynamic HWFC handling
        Interface MCU firmware
        MSD
      Hardware description
        Hardware drawings
        Block diagram
        Power supply
          5 V power sources
          VDD power sources
          Interface MCU power
          nRF52840 power source
          nRF52840 direct supply
        Operating modes
          USB detect
          nRF only mode
          Signal switches
        External memory
        Connector interface
        Buttons and LEDs
        32.768 kHz crystal
        Measuring current
          Preparing the development kit board
          Using an oscilloscope for current profile measurement
          Using an ampere-meter for current measurement
        RF measurements
        Debug input and Trace
        Debug output
        NFC antenna interface
        Extra op-amp
        Solder bridge configuration
      Legal notices
  nRF52832
    Product Specification
      Revision history
      About this document
        Document naming and status
        Peripheral naming and abbreviations
        Register tables
          Fields and values
         Registers
           DUMMY
      Block diagram
      Pin assignments
        QFN48 pin assignments
        WLCSP ball assignments
        GPIO usage restrictions
          GPIO located near the radio
          NFC antenna pins
      Absolute maximum ratings
      Recommended operating conditions
        WLCSP light sensitivity
      CPU
        Floating point interrupt
         Electrical specification
           CPU performance
        CPU and support module configuration
      Memory
        RAM - Random access memory
        Flash - Non-volatile memory
        Memory map
         Instantiation
      AHB multilayer
        AHB multilayer priorities
      EasyDMA
        EasyDMA array list
      NVMC — Non-volatile memory controller
        Writing to Flash
        Erasing a page in Flash
        Writing to user information configuration registers (UICR)
        Erasing user information configuration registers (UICR)
        Erase all
        Cache
         Registers
           READY
           CONFIG
           ERASEPAGE
           ERASEPCR1 ( Deprecated )
           ERASEALL
           ERASEPCR0 ( Deprecated )
           ERASEUICR
           ICACHECNF
           IHIT
           IMISS
         Electrical specification
           Flash programming
           Cache size
      BPROT — Block protection
         Registers
           CONFIG0
           CONFIG1
           DISABLEINDEBUG
           CONFIG2
           CONFIG3
      FICR — Factory information configuration registers
         Registers
           CODEPAGESIZE
           CODESIZE
           DEVICEID[0]
           DEVICEID[1]
           ER[0]
           ER[1]
           ER[2]
           ER[3]
           IR[0]
           IR[1]
           IR[2]
           IR[3]
           DEVICEADDRTYPE
           DEVICEADDR[0]
           DEVICEADDR[1]
           INFO.PART
           INFO.VARIANT
           INFO.PACKAGE
           INFO.RAM
           INFO.FLASH
           TEMP.A0
           TEMP.A1
           TEMP.A2
           TEMP.A3
           TEMP.A4
           TEMP.A5
           TEMP.B0
           TEMP.B1
           TEMP.B2
           TEMP.B3
           TEMP.B4
           TEMP.B5
           TEMP.T0
           TEMP.T1
           TEMP.T2
           TEMP.T3
           TEMP.T4
           NFC.TAGHEADER0
           NFC.TAGHEADER1
           NFC.TAGHEADER2
           NFC.TAGHEADER3
      UICR — User information configuration registers
         Registers
           NRFFW[0]
           NRFFW[1]
           NRFFW[2]
           NRFFW[3]
           NRFFW[4]
           NRFFW[5]
           NRFFW[6]
           NRFFW[7]
           NRFFW[8]
           NRFFW[9]
           NRFFW[10]
           NRFFW[11]
           NRFFW[12]
           NRFFW[13]
           NRFFW[14]
           NRFHW[0]
           NRFHW[1]
           NRFHW[2]
           NRFHW[3]
           NRFHW[4]
           NRFHW[5]
           NRFHW[6]
           NRFHW[7]
           NRFHW[8]
           NRFHW[9]
           NRFHW[10]
           NRFHW[11]
           CUSTOMER[0]
           CUSTOMER[1]
           CUSTOMER[2]
           CUSTOMER[3]
           CUSTOMER[4]
           CUSTOMER[5]
           CUSTOMER[6]
           CUSTOMER[7]
           CUSTOMER[8]
           CUSTOMER[9]
           CUSTOMER[10]
           CUSTOMER[11]
           CUSTOMER[12]
           CUSTOMER[13]
           CUSTOMER[14]
           CUSTOMER[15]
           CUSTOMER[16]
           CUSTOMER[17]
           CUSTOMER[18]
           CUSTOMER[19]
           CUSTOMER[20]
           CUSTOMER[21]
           CUSTOMER[22]
           CUSTOMER[23]
           CUSTOMER[24]
           CUSTOMER[25]
           CUSTOMER[26]
           CUSTOMER[27]
           CUSTOMER[28]
           CUSTOMER[29]
           CUSTOMER[30]
           CUSTOMER[31]
           PSELRESET[0]
           PSELRESET[1]
           APPROTECT
           NFCPINS
      Peripheral interface
        Peripheral ID
        Peripherals with shared ID
        Peripheral registers
        Bit set and clear
        Tasks
        Events
        Shortcuts
        Interrupts
      Debug and trace
        DAP - Debug Access Port
        CTRL-AP - Control Access Port
           Registers
             RESET
             ERASEALL
             ERASEALLSTATUS
             APPROTECTSTATUS
             IDR
        Debug interface mode
        Real-time debug
        Trace
           Electrical specification
             Trace port
      Power and clock management
        Current consumption scenarios
           Electrical specification
             Current consumption: Radio
             Current consumption: Radio protocol configurations
             Current consumption: Ultra-low power
      POWER — Power supply
        Regulators
        System OFF mode
          Emulated System OFF mode
        System ON mode
          Sub power modes
        Power supply supervisor
          Power-fail comparator
        RAM sections
        Reset
          Power-on reset
          Pin reset
          Wakeup from System OFF mode reset
          Soft reset
          Watchdog reset
          Brown-out reset
        Retained registers
        Reset behavior
         Registers
           INTENSET
           INTENCLR
           RESETREAS
           RAMSTATUS ( Deprecated )
           SYSTEMOFF
           POFCON
           GPREGRET
           GPREGRET2
           RAMON ( Deprecated )
           RAMONB ( Deprecated )
           DCDCEN
           RAM[0].POWER
           RAM[0].POWERSET
           RAM[0].POWERCLR
           RAM[1].POWER
           RAM[1].POWERSET
           RAM[1].POWERCLR
           RAM[2].POWER
           RAM[2].POWERSET
           RAM[2].POWERCLR
           RAM[3].POWER
           RAM[3].POWERSET
           RAM[3].POWERCLR
           RAM[4].POWER
           RAM[4].POWERSET
           RAM[4].POWERCLR
           RAM[5].POWER
           RAM[5].POWERSET
           RAM[5].POWERCLR
           RAM[6].POWER
           RAM[6].POWERSET
           RAM[6].POWERCLR
           RAM[7].POWER
           RAM[7].POWERSET
           RAM[7].POWERCLR
         Electrical specification
           Current consumption, sleep
           Device startup times
           Power fail comparator
      CLOCK — Clock control
        HFCLK clock controller
          64 MHz crystal oscillator (HFXO)
        LFCLK clock controller
          32.768 kHz RC oscillator (LFRC)
          Calibrating the 32.768 kHz RC oscillator
          Calibration timer
          32.768 kHz crystal oscillator (LFXO)
          32.768 kHz synthesized from HFCLK (LFSYNT)
         Registers
           INTENSET
           INTENCLR
           HFCLKRUN
           HFCLKSTAT
           LFCLKRUN
           LFCLKSTAT
           LFCLKSRCCOPY
           LFCLKSRC
           CTIV ( Retained )
           TRACECONFIG
         Electrical specification
           64 MHz internal oscillator (HFINT)
           64 MHz crystal oscillator (HFXO)
           32.768 kHz RC oscillator (LFRC)
           32.768 kHz crystal oscillator (LFXO)
           32.768 kHz synthesized from HFCLK (LFSYNT)
      GPIO — General purpose input/output
        Pin configuration
        GPIO located near the RADIO
         Registers
           OUT
           OUTSET
           OUTCLR
           IN
           DIR
           DIRSET
           DIRCLR
           LATCH
           DETECTMODE
           PIN_CNF[0]
           PIN_CNF[1]
           PIN_CNF[2]
           PIN_CNF[3]
           PIN_CNF[4]
           PIN_CNF[5]
           PIN_CNF[6]
           PIN_CNF[7]
           PIN_CNF[8]
           PIN_CNF[9]
           PIN_CNF[10]
           PIN_CNF[11]
           PIN_CNF[12]
           PIN_CNF[13]
           PIN_CNF[14]
           PIN_CNF[15]
           PIN_CNF[16]
           PIN_CNF[17]
           PIN_CNF[18]
           PIN_CNF[19]
           PIN_CNF[20]
           PIN_CNF[21]
           PIN_CNF[22]
           PIN_CNF[23]
           PIN_CNF[24]
           PIN_CNF[25]
           PIN_CNF[26]
           PIN_CNF[27]
           PIN_CNF[28]
           PIN_CNF[29]
           PIN_CNF[30]
           PIN_CNF[31]
         Electrical specification
           GPIO Electrical Specification
      GPIOTE — GPIO tasks and events
        Pin events and tasks
        Port event
        Tasks and events pin configuration
         Registers
           INTENSET
           INTENCLR
           CONFIG[0]
           CONFIG[1]
           CONFIG[2]
           CONFIG[3]
           CONFIG[4]
           CONFIG[5]
           CONFIG[6]
           CONFIG[7]
         Electrical specification
           GPIOTE Electrical Specification
      PPI — Programmable peripheral interconnect
        Pre-programmed channels
         Registers
           CHEN
           CHENSET
           CHENCLR
           CH[0].EEP
           CH[0].TEP
           CH[1].EEP
           CH[1].TEP
           CH[2].EEP
           CH[2].TEP
           CH[3].EEP
           CH[3].TEP
           CH[4].EEP
           CH[4].TEP
           CH[5].EEP
           CH[5].TEP
           CH[6].EEP
           CH[6].TEP
           CH[7].EEP
           CH[7].TEP
           CH[8].EEP
           CH[8].TEP
           CH[9].EEP
           CH[9].TEP
           CH[10].EEP
           CH[10].TEP
           CH[11].EEP
           CH[11].TEP
           CH[12].EEP
           CH[12].TEP
           CH[13].EEP
           CH[13].TEP
           CH[14].EEP
           CH[14].TEP
           CH[15].EEP
           CH[15].TEP
           CH[16].EEP
           CH[16].TEP
           CH[17].EEP
           CH[17].TEP
           CH[18].EEP
           CH[18].TEP
           CH[19].EEP
           CH[19].TEP
           CHG[0]
           CHG[1]
           CHG[2]
           CHG[3]
           CHG[4]
           CHG[5]
           FORK[0].TEP
           FORK[1].TEP
           FORK[2].TEP
           FORK[3].TEP
           FORK[4].TEP
           FORK[5].TEP
           FORK[6].TEP
           FORK[7].TEP
           FORK[8].TEP
           FORK[9].TEP
           FORK[10].TEP
           FORK[11].TEP
           FORK[12].TEP
           FORK[13].TEP
           FORK[14].TEP
           FORK[15].TEP
           FORK[16].TEP
           FORK[17].TEP
           FORK[18].TEP
           FORK[19].TEP
           FORK[20].TEP
           FORK[21].TEP
           FORK[22].TEP
           FORK[23].TEP
           FORK[24].TEP
           FORK[25].TEP
           FORK[26].TEP
           FORK[27].TEP
           FORK[28].TEP
           FORK[29].TEP
           FORK[30].TEP
           FORK[31].TEP
      RADIO — 2.4 GHz Radio
        EasyDMA
        Packet configuration
        Maximum packet length
        Address configuration
        Data whitening
        CRC
        Radio states
        Transmit sequence
        Receive sequence
        Received Signal Strength Indicator (RSSI)
        Interframe spacing
        Device address match
        Bit counter
         Registers
           SHORTS
           INTENSET
           INTENCLR
           CRCSTATUS
           RXMATCH
           RXCRC
           DAI
           PACKETPTR
           FREQUENCY
           TXPOWER
           MODE
           PCNF0
           PCNF1
           BASE0
           BASE1
           PREFIX0
           PREFIX1
           TXADDRESS
           RXADDRESSES
           CRCCNF
           CRCPOLY
           CRCINIT
           TIFS
           RSSISAMPLE
           STATE
           DATAWHITEIV
           BCC
           DAB[0]
           DAB[1]
           DAB[2]
           DAB[3]
           DAB[4]
           DAB[5]
           DAB[6]
           DAB[7]
           DAP[0]
           DAP[1]
           DAP[2]
           DAP[3]
           DAP[4]
           DAP[5]
           DAP[6]
           DAP[7]
           DACNF
           MODECNF0
           POWER
         Electrical specification
           General Radio Characteristics
           Radio current consumption (Transmitter)
           Radio current consumption (Receiver)
           Transmitter specification
           Receiver operation
           RX selectivity
           RX intermodulation
           Radio timing
           Received Signal Strength Indicator (RSSI) specifications
           Jitter
           Delay when disabling the RADIO
      TIMER — Timer/counter
        Capture
        Compare
        Task delays
        Task priority
         Registers
           SHORTS
           INTENSET
           INTENCLR
           MODE
           BITMODE
           PRESCALER
           CC[0]
           CC[1]
           CC[2]
           CC[3]
           CC[4]
           CC[5]
         Electrical specification
           Timers Electrical Specification
      RTC — Real-time counter
        Clock source
        Resolution versus overflow and the PRESCALER
        COUNTER register
        Overflow features
        TICK event
        Event control feature
        Compare feature
        TASK and EVENT jitter/delay
        Reading the COUNTER register
         Registers
           INTENSET
           INTENCLR
           EVTEN
           EVTENSET
           EVTENCLR
           COUNTER
           PRESCALER
           CC[0]
           CC[1]
           CC[2]
           CC[3]
         Electrical specification
           RTC Electrical Specification
      RNG — Random number generator
        Bias correction
        Speed
         Registers
           SHORTS
           INTENSET
           INTENCLR
           CONFIG
           VALUE
         Electrical specification
           RNG Electrical Specification
      TEMP — Temperature sensor
         Registers
           INTENSET
           INTENCLR
           TEMP
           A0
           A1
           A2
           A3
           A4
           A5
           B0
           B1
           B2
           B3
           B4
           B5
           T0
           T1
           T2
           T3
           T4
         Electrical specification
           Temperature Sensor Electrical Specification
      ECB — AES electronic codebook mode encryption
        Shared resources
        EasyDMA
        ECB data structure
         Registers
           INTENSET
           INTENCLR
           ECBDATAPTR
         Electrical specification
           ECB Electrical Specification
      CCM — AES CCM mode encryption
        Shared resources
        Encryption
        Decryption
        AES CCM and RADIO concurrent operation
        Encrypting packets on-the-fly in radio transmit mode
        Decrypting packets on-the-fly in radio receive mode
        CCM data structure
        EasyDMA and ERROR event
         Registers
           SHORTS
           INTENSET
           INTENCLR
           MICSTATUS
           ENABLE
           MODE
           CNFPTR
           INPTR
           OUTPTR
           SCRATCHPTR
      AAR — Accelerated address resolver
        Shared resources
        EasyDMA
        Resolving a resolvable address
        Use case example for chaining RADIO packet reception with address resolution using AAR
        IRK data structure
         Registers
           INTENSET
           INTENCLR
           STATUS
           ENABLE
           NIRK
           IRKPTR
           ADDRPTR
           SCRATCHPTR
         Electrical specification
           AAR Electrical Specification
      SPIM — Serial peripheral interface master with EasyDMA
        Shared resources
        EasyDMA
          EasyDMA list
            EasyDMA array list
        SPI master transaction sequence
        Low power
        Master mode pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ENABLE
           PSEL.SCK
           PSEL.MOSI
           PSEL.MISO
           FREQUENCY
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           RXD.LIST
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           TXD.LIST
           CONFIG
           ORC
         Electrical specification
           SPIM master interface electrical specifications
           Serial Peripheral Interface Master (SPIM) timing specifications
      SPIS — Serial peripheral interface slave with EasyDMA
        Shared resources
        EasyDMA
        SPI slave operation
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           SEMSTAT
           STATUS
           ENABLE
           PSELSCK ( Deprecated )
           PSELMISO ( Deprecated )
           PSELMOSI ( Deprecated )
           PSELCSN ( Deprecated )
           PSEL.SCK
           PSEL.MISO
           PSEL.MOSI
           PSEL.CSN
           RXDPTR ( Deprecated )
           MAXRX ( Deprecated )
           AMOUNTRX ( Deprecated )
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXDPTR ( Deprecated )
           MAXTX ( Deprecated )
           AMOUNTTX ( Deprecated )
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           CONFIG
           DEF
           ORC
         Electrical specification
           SPIS slave interface electrical specifications
           Serial Peripheral Interface Slave (SPIS) timing specifications
      TWIM — I2C compatible two-wire interface master with EasyDMA
        Shared resources
        EasyDMA
          EasyDMA list
            EasyDMA array list
        Master write sequence
        Master read sequence
        Master repeated start sequence
        Low power
        Master mode pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.SCL
           PSEL.SDA
           FREQUENCY
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           RXD.LIST
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           TXD.LIST
           ADDRESS
         Electrical specification
           TWIM interface electrical specifications
           Two Wire Interface Master (TWIM) timing specifications
      TWIS — I2C compatible two-wire interface slave with EasyDMA
        Shared resources
        EasyDMA
        TWI slave responding to a read command
        TWI slave responding to a write command
        Master repeated start sequence
        Terminating an ongoing TWI transaction
        Low power
        Slave mode pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           MATCH
           ENABLE
           PSEL.SCL
           PSEL.SDA
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           ADDRESS[0]
           ADDRESS[1]
           CONFIG
           ORC
         Electrical specification
           TWIS slave interface electrical specifications
           TWIS slave timing specifications
      UARTE — Universal asynchronous receiver/transmitter with EasyDMA
        Shared resources
        EasyDMA
        Transmission
        Reception
        Error conditions
        Using the UARTE without flow control
        Parity configuration
        Low power
        Pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSEL.RTS
           PSEL.TXD
           PSEL.CTS
           PSEL.RXD
           BAUDRATE
           RXD.PTR
           RXD.MAXCNT
           RXD.AMOUNT
           TXD.PTR
           TXD.MAXCNT
           TXD.AMOUNT
           CONFIG
         Electrical specification
           UARTE electrical specification
      QDEC — Quadrature decoder
        Sampling and decoding
        LED output
        Debounce filters
        Accumulators
        Output/input pins
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ENABLE
           LEDPOL
           SAMPLEPER
           SAMPLE
           REPORTPER
           ACC
           ACCREAD
           PSEL.LED
           PSEL.A
           PSEL.B
           DBFEN
           LEDPRE
           ACCDBL
           ACCDBLREAD
         Electrical specification
           QDEC Electrical Specification
      SAADC — Successive approximation analog-to-digital converter
        Shared resources
        Overview
        Digital output
        Analog inputs and channels
        Operation modes
          One-shot mode
          Continuous mode
          Oversampling
          Scan mode
        EasyDMA
        Resistor ladder
        Reference
        Acquisition time
        Limits event monitoring
         Registers
           INTEN
           INTENSET
           INTENCLR
           STATUS
           ENABLE
           CH[0].PSELP
           CH[0].PSELN
           CH[0].CONFIG
           CH[0].LIMIT
           CH[1].PSELP
           CH[1].PSELN
           CH[1].CONFIG
           CH[1].LIMIT
           CH[2].PSELP
           CH[2].PSELN
           CH[2].CONFIG
           CH[2].LIMIT
           CH[3].PSELP
           CH[3].PSELN
           CH[3].CONFIG
           CH[3].LIMIT
           CH[4].PSELP
           CH[4].PSELN
           CH[4].CONFIG
           CH[4].LIMIT
           CH[5].PSELP
           CH[5].PSELN
           CH[5].CONFIG
           CH[5].LIMIT
           CH[6].PSELP
           CH[6].PSELN
           CH[6].CONFIG
           CH[6].LIMIT
           CH[7].PSELP
           CH[7].PSELN
           CH[7].CONFIG
           CH[7].LIMIT
           RESOLUTION
           OVERSAMPLE
           SAMPLERATE
           RESULT.PTR
           RESULT.MAXCNT
           RESULT.AMOUNT
         Electrical specification
           SAADC Electrical Specification
        Performance factors
      COMP — Comparator
        Differential mode
        Single-ended mode
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           RESULT
           ENABLE
           PSEL
           REFSEL
           EXTREFSEL
           TH
           MODE
           HYST
           ISOURCE
         Electrical specification
           COMP Electrical Specification
      LPCOMP — Low power comparator
        Shared resources
        Pin configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           RESULT
           ENABLE
           PSEL
           REFSEL
           EXTREFSEL
           ANADETECT
           HYST
         Electrical specification
           LPCOMP Electrical Specification
      WDT — Watchdog timer
        Reload criteria
        Temporarily pausing the watchdog
        Watchdog reset
         Registers
           INTENSET
           INTENCLR
           RUNSTATUS
           REQSTATUS
           CRV
           RREN
           CONFIG
           RR[0]
           RR[1]
           RR[2]
           RR[3]
           RR[4]
           RR[5]
           RR[6]
           RR[7]
         Electrical specification
           Watchdog Timer Electrical Specification
      SWI — Software interrupts
         Registers
      NFCT — Near field communication tag
        Overview
        Pin configuration
        EasyDMA
        Collision resolution
        Frame timing controller
        Frame assembler
        Frame disassembler
        Antenna interface
        NFCT antenna recommendations
        Battery protection
         References
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ERRORSTATUS
           FRAMESTATUS.RX
           CURRENTLOADCTRL
           FIELDPRESENT
           FRAMEDELAYMIN
           FRAMEDELAYMAX
           FRAMEDELAYMODE
           PACKETPTR
           MAXLEN
           TXD.FRAMECONFIG
           TXD.AMOUNT
           RXD.FRAMECONFIG
           RXD.AMOUNT
           NFCID1_LAST
           NFCID1_2ND_LAST
           NFCID1_3RD_LAST
           SENSRES
           SELRES
         Electrical specification
           NFCT Electrical Specification
           NFCT Timing Parameters
      PDM — Pulse density modulation interface
        Master clock generator
        Module operation
        Decimation filter
        EasyDMA
        Hardware example
        Pin configuration
         Registers
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           PDMCLKCTRL
           MODE
           GAINL
           GAINR
           PSEL.CLK
           PSEL.DIN
           SAMPLE.PTR
           SAMPLE.MAXCNT
         Electrical specification
           PDM Electrical Specification
      I2S — Inter-IC sound interface
        Mode
        Transmitting and receiving
        Left right clock (LRCK)
        Serial clock (SCK)
        Master clock (MCK)
        Width, alignment and format
        EasyDMA
        Module operation
        Pin configuration
         Registers
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           CONFIG.MODE
           CONFIG.RXEN
           CONFIG.TXEN
           CONFIG.MCKEN
           CONFIG.MCKFREQ
           CONFIG.RATIO
           CONFIG.SWIDTH
           CONFIG.ALIGN
           CONFIG.FORMAT
           CONFIG.CHANNELS
           RXD.PTR
           TXD.PTR
           RXTXD.MAXCNT
           PSEL.MCK
           PSEL.SCK
           PSEL.LRCK
           PSEL.SDIN
           PSEL.SDOUT
         Electrical specification
           I2S timing specification
      MWU — Memory watch unit
         Registers
           INTEN
           INTENSET
           INTENCLR
           NMIEN
           NMIENSET
           NMIENCLR
           PERREGION[0].SUBSTATWA
           PERREGION[0].SUBSTATRA
           PERREGION[1].SUBSTATWA
           PERREGION[1].SUBSTATRA
           REGIONEN
           REGIONENSET
           REGIONENCLR
           REGION[0].START
           REGION[0].END
           REGION[1].START
           REGION[1].END
           REGION[2].START
           REGION[2].END
           REGION[3].START
           REGION[3].END
           PREGION[0].START
           PREGION[0].END
           PREGION[0].SUBS
           PREGION[1].START
           PREGION[1].END
           PREGION[1].SUBS
      EGU — Event generator unit
         Registers
           INTEN
           INTENSET
           INTENCLR
         Electrical specification
           EGU Electrical Specification
      PWM — Pulse width modulation
        Wave counter
        Decoder with EasyDMA
        Limitations
        Pin configuration
         Registers
           SHORTS
           INTEN
           INTENSET
           INTENCLR
           ENABLE
           MODE
           COUNTERTOP
           PRESCALER
           DECODER
           LOOP
           SEQ[0].PTR
           SEQ[0].CNT
           SEQ[0].REFRESH
           SEQ[0].ENDDELAY
           SEQ[1].PTR
           SEQ[1].CNT
           SEQ[1].REFRESH
           SEQ[1].ENDDELAY
           PSEL.OUT[0]
           PSEL.OUT[1]
           PSEL.OUT[2]
           PSEL.OUT[3]
         Electrical specification
           PWM Electrical Specification
      SPI — Serial peripheral interface master
        Functional description
          SPI master mode pin configuration
          Shared resources
          SPI master transaction sequence
         Registers
           INTENSET
           INTENCLR
           ENABLE
           PSELSCK ( Deprecated )
           PSELMOSI ( Deprecated )
           PSELMISO ( Deprecated )
           PSEL.SCK
           PSEL.MOSI
           PSEL.MISO
           RXD
           TXD
           FREQUENCY
           CONFIG
         Electrical specification
           SPI master interface
           Serial Peripheral Interface (SPI) Master timing specifications
      TWI — I2C compatible two-wire interface
        Functional description
        Master mode pin configuration
        Shared resources
        Master write sequence
        Master read sequence
        Master repeated start sequence
        Low power
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSELSCL
           PSELSDA
           RXD
           TXD
           FREQUENCY
           ADDRESS
         Electrical specification
           TWI interface electrical specifications
           Two Wire Interface (TWI) timing specifications
      UART — Universal asynchronous receiver/transmitter
        Functional description
        Pin configuration
        Shared resources
        Transmission
        Reception
        Suspending the UART
        Error conditions
        Using the UART without flow control
        Parity configuration
         Registers
           SHORTS
           INTENSET
           INTENCLR
           ERRORSRC
           ENABLE
           PSELRTS
           PSELTXD
           PSELCTS
           PSELRXD
           RXD
           TXD
           BAUDRATE
           CONFIG
         Electrical specification
           UART electrical specification
      Mechanical specifications
        QFN48 6 x 6 mm package
        WLCSP package
      Ordering information
        IC marking
        Box labels
        Order code
        Code ranges and values
        Product options
      Reference circuitry
        Schematic QFAA and QFAB QFN48 with internal LDO setup
        Schematic QFAA and QFAB QFN48 with DC/DC regulator setup
        Schematic QFAA and QFAB QFN48 with DC/DC regulator and NFC setup
        Schematic CIAA WLCSP with internal LDO setup
        Schematic CIAA WLCSP with DC/DC regulator setup
        Schematic CIAA WLCSP with DC/DC regulator and NFC setup
        PCB guidelines
        PCB layout example
      Liability disclaimer
        RoHS and REACH statement
        Life support applications
    Errata
      nRF52832 Rev 1 Errata
        Change log
        New and inherited anomalies
          [12] COMP: Reference ladder is not correctly calibrated
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [36] CLOCK: Some registers are not reset when expected
          [51] I2S: Aligned stereo slave mode does not work
          [54] I2S: Wrong LRCK polarity in Aligned mode
          [55] I2S: RXPTRUPD and TXPTRUPD events asserted after STOP
          [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1
          [64] NFCT: Only full bytes can be received or transmitted, but supports 4-bit frame transmit
          [66] TEMP: Linearity specification not met with default settings
          [67] NFCT,PPI: Some events cannot be used with the PPI
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [72] NFCT,PPI: TASKS_ACTIVATE cannot be used with the PPI
          [74] SAADC: Started events fires prematurely
          [75] MWU: Increased current consumption
          [76] LPCOMP: READY event is set sooner than it should
          [77] CLOCK: RC oscillator is not calibrated when first started
          [78] TIMER: High current consumption when using timer STOP task only
          [79] NFCT: A false EVENTS_FIELDDETECTED event occurs after the field is lost
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [84] COMP: ISOURCE not functional
          [86] SAADC: Triggering START task after offset calibration may write a sample to RAM
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [89] TWI: Static 400 µA current while using GPIOTE
          [91] RADIO: Radio performance using CSP package version
          [97] GPIOTE: High current consumption in System ON Idle mode
          [101] CLOCK: Sleep current increases after soft reset
          [102] RADIO: PAYLOAD/END events delayed or not triggered after ADDRESS
          [106] RADIO: Higher CRC error rates for some access addresses
          [107] RADIO: Immediate address match for access addresses containing MSBs 0x00
          [108] RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode
          [109] DMA: DMA access transfers might be corrupted
          [113] COMP: Single-ended mode with external reference is not functional
          [132] CLOCK: The LFRC oscillator might not start
          [136] System: Bits in RESETREAS are set when they should not be
          [138] RADIO: Spurious emission on GPIO exceeds limits in radiated tests
          [141] NFCT: HFCLK not stopped when entering SENSE mode
          [143] RADIO: False CRC failures on specific addresses
          [146] CLOCK: LFRC frequency deviation
          [149] TWIM: First clock pulse after clock stretching may be too long or too short
          [150] SAADC: EVENT_STARTED does not fire
          [155] GPIOTE: IN event may occur more than once on input edge
          [156] GPIOTE: Some CLR tasks give unintentional behavior
          [163] FICR: Code and RAM size fields do not match chip specification
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [178] SAADC: END event firing too early
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [181] NFCT: Invalid value in FICR for double-size NFCID1
          [183] PWM: False SEQEND[0] and SEQEND[1] events
      nRF52832 Engineering C Errata
        Change log
        New and inherited anomalies
          [12] COMP: Reference ladder is not correctly calibrated
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [36] CLOCK: Some registers are not reset when expected
          [51] I2S: Aligned stereo slave mode does not work
          [54] I2S: Wrong LRCK polarity in Aligned mode
          [55] I2S: RXPTRUPD and TXPTRUPD events asserted after STOP
          [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1
          [64] NFCT: Only full bytes can be received or transmitted, but supports 4-bit frame transmit
          [66] TEMP: Linearity specification not met with default settings
          [67] NFCT,PPI: Some events cannot be used with the PPI
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [72] NFCT,PPI: TASKS_ACTIVATE cannot be used with the PPI
          [74] SAADC: Started events fires prematurely
          [75] MWU: Increased current consumption
          [76] LPCOMP: READY event is set sooner than it should
          [77] CLOCK: RC oscillator is not calibrated when first started
          [78] TIMER: High current consumption when using timer STOP task only
          [79] NFCT: A false EVENTS_FIELDDETECTED event occurs after the field is lost
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [84] COMP: ISOURCE not functional
          [86] SAADC: Triggering START task after offset calibration may write a sample to RAM
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [89] TWI: Static 400 µA current while using GPIOTE
          [91] RADIO: Radio performance using CSP package version
          [97] GPIOTE: High current consumption in System ON Idle mode
          [101] CLOCK: Sleep current increases after soft reset
          [102] RADIO: PAYLOAD/END events delayed or not triggered after ADDRESS
          [106] RADIO: Higher CRC error rates for some access addresses
          [107] RADIO: Immediate address match for access addresses containing MSBs 0x00
          [108] RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode
          [109] DMA: DMA access transfers might be corrupted
          [113] COMP: Single-ended mode with external reference is not functional
          [132] CLOCK: The LFRC oscillator might not start
          [136] System: Bits in RESETREAS are set when they should not be
          [138] RADIO: Spurious emission on GPIO exceeds limits in radiated tests
          [141] NFCT: HFCLK not stopped when entering SENSE mode
          [143] RADIO: False CRC failures on specific addresses
          [146] CLOCK: LFRC frequency deviation
          [149] TWIM: First clock pulse after clock stretching may be too long or too short
          [150] SAADC: EVENT_STARTED does not fire
          [155] GPIOTE: IN event may occur more than once on input edge
          [156] GPIOTE: Some CLR tasks give unintentional behavior
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [178] SAADC: END event firing too early
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [183] PWM: False SEQEND[0] and SEQEND[1] events
        Fixed anomalies
      nRF52832 Engineering B Errata v1.3
        Change log
        New and inherited anomalies
          [12] COMP: Reference ladder is not correctly calibrated
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [36] CLOCK: Some registers are not reset when expected
          [51] I2S: Aligned stereo slave mode does not work
          [54] I2S: Wrong LRCK polarity in Aligned mode
          [55] I2S: RXPTRUPD and TXPTRUPD events asserted after STOP
          [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1
          [62] NFCT: Can draw current when not enabled
          [63] POWER: DC/DC does not automatically switch off in System ON IDLE
          [64] NFCT: Only full bytes can be received or transmitted, but supports 4-bit frame transmit
          [67] NFCT,PPI: Some events cannot be used with the PPI
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [70] COMP: Not able to wake CPU from System ON IDLE
          [71] CLOCK: RCOSC calibration
          [72] NFCT,PPI: TASKS_ACTIVATE cannot be used with the PPI
          [73] TIMER: Event lost
          [74] SAADC: Started events fires prematurely
          [75] MWU: Increased current consumption
          [76] LPCOMP: READY event is set sooner than it should
          [77] CLOCK: RC oscillator is not calibrated when first started
          [78] TIMER: High current consumption when using timer STOP task only
          [79] NFCT: A false EVENTS_FIELDDETECTED event occurs after the field is lost
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [84] COMP: ISOURCE not functional
          [86] SAADC: Triggering START task after offset calibration may write a sample to RAM
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [89] TWI: Static 400 µA current while using GPIOTE
          [97] GPIOTE: High current consumption in System ON Idle mode
          [108] RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode
        Fixed anomalies
      nRF52832 Engineering A Errata v1.2
        Change log
        New and inherited anomalies
          [1] I2S: I2S not functional
          [2] PWM: PWM not functional
          [3] PDM: PDM not functional
          [4] MWU: MWU not functional
          [7] NVMC,System: Cache is not functional
          [8] SAADC: Increased current consumption in system ON-IDLE
          [9] QDEC: Some features are not functional
          [10] RTC: RTC2 is not functional
          [11] System: Device is unable to stay in System OFF mode
          [12] COMP: Reference ladder is not correctly calibrated
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [16] System: RAM may be corrupt on wakeup from CPU IDLE
          [17] NFCT: The EVENTS_FIELDLOST is not generated
          [20] RTC: Register values are invalid
          [23] SPIM: END event is generated before ENDTX
          [24] NFCT: The FIELDPRESENT register read is not reliable
          [25] NFCT: Reset value of SENSRES register is incorrect
          [26] NFCT: NFC field does not wakeup the device from emulated system OFF
          [27] NFCT: Triggering NFCT ACTIVATE task also activates the Rx easyDMA
          [28] SAADC: Scan mode is not functional for some analog inputs
          [29] TWIS: Incorrect bits in ERRORSRC
          [30] TWIS: STOP Task is not functional
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [32] DIF: Debug session automatically enables TracePort pins
          [33] System: Code RAM is located at wrong address
          [34] System: Code and Data RAM are not mapped from the same physical RAM
          [35] CLOCK: HFCLK can draw current when not requested
          [36] CLOCK: Some registers are not reset when expected
          [37] RADIO: Encryption engine is slow by default.
          [38] PPI: Enable/disable tasks for channel group 4 and 5 cannot be triggered through PPI
          [39] NFCT: The automatic collision resolution does not handle CRC and parity errors
          [40] NFCT: The FRAMEDELAYMODE = WindowGrid is not supported
          [41] GPIO: PIN_CNF[x] registers not reset after pin reset
          [42] PPI: FORK on the fixed channels is not functional
          [43] SPIS: SPIS0 is not functional
          [44] NVMC: Read after flash erase is unpredictable
          [46] SPIM,TWIM: EasyDMA list not functional
          [47] DIF: Trace is not functional
          [48] DIF: SWO only works if Trace is enabled.
          [49] RTC: RTC is not functional after LFCLK is restarted
          [57] NFCT: NFC Modulation amplitude
          [58] SPIM: An additional byte is clocked out when RXD.MAXCNT = 1
          [63] POWER: DC/DC does not automatically switch off in System ON IDLE
          [64] NFCT: Only full bytes can be received or transmitted, but supports 4-bit frame transmit
          [65] POWER: RAM[] registers mapping of RAM block and sections is wrong
          [67] NFCT,PPI: Some events cannot be used with the PPI
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [70] COMP: Not able to wake CPU from System ON IDLE
          [71] CLOCK: RCOSC calibration
          [72] NFCT,PPI: TASKS_ACTIVATE cannot be used with the PPI
          [73] TIMER: Event lost
          [74] SAADC: Started events fires prematurely
          [77] CLOCK: RC oscillator is not calibrated when first started
          [78] TIMER: High current consumption when using timer STOP task only
          [84] COMP: ISOURCE not functional
          [86] SAADC: Triggering START task after offset calibration may write a sample to RAM
          [87] CPU: Unexpected wake from System ON Idle when using FPU
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [97] GPIOTE: High current consumption in System ON Idle mode
    Product Change Notification
    Compatibility Matrix
      IC revision overview
      Documentation and reference design files overview
      IC revisions, SDK, and SoftDevice compatibility matrix
      IC revisions compatibility with development HW
      Bluetooth low energy QDID matrix
      Revision history
    nRF52 Development Kit (for nRF52832)
      Revision history
      Setting up the development kit
      Software tools
      Start developing
      Interface MCU
        IF Boot/Reset button
        Virtual COM port
          Dynamic Hardware Flow Control (HWFC) handling
        Interface MCU firmware
        MSD
      Hardware description
        Hardware drawings
        Block diagram
        Power supply
        Connector interface
        Buttons and LEDs
          I/O expander for buttons and LEDs
        32.768 kHz crystal
        Measuring current
          Preparing the development kit board
          Using an oscilloscope for current profile measurement
          Using an ampere-meter for current measurement
        RF measurements
        Debug input
        Debug output
        NFC antenna interface
        Solder bridge configuration
      Legal notices
    nRF52 Preview Development Kit (for nRF52832)
      Revision history
      Setting up the development kit
      Software tools
      Start developing
      Interface MCU
        IF Boot/Reset button
        Virtual COM port
        Interface MCU firmware (FW)
        MSD
      Hardware description
        Hardware drawings
        Block diagram
        Power supply
        Connector interface
        Buttons and LEDs
          I/O expander for buttons and LEDs
        32.768 kHz crystal
        Measuring current
        RF measurements
        Debug input
        Debug output
        NFC antenna interface
      Legal notices
  nRF52810
    Product Specification
      Revision history
      About this document
        Document naming and status
        Peripheral naming and abbreviations
        Register tables
          Fields and values
         Registers
           DUMMY
      Block diagram
      Core components
        CPU
           Electrical specification
             CPU performance
          CPU and support module configuration
        Memory
          RAM - Random access memory
          Flash - Non-volatile memory
          Memory map
           Instantiation
        NVMC — Non-volatile memory controller
          Writing to flash
          Erasing a page in flash
          Writing to user information configuration registers (UICR)
          Erasing user information configuration registers (UICR)
          Erase all
           Registers
             READY
             CONFIG
             ERASEPCR1 ( Deprecated )
             ERASEPAGE
             ERASEALL
             ERASEPCR0 ( Deprecated )
             ERASEUICR
           Electrical specification
             Flash programming
        FICR — Factory information configuration registers
           Registers
             CODEPAGESIZE
             CODESIZE
             DEVICEID[0]
             DEVICEID[1]
             ER[0]
             ER[1]
             ER[2]
             ER[3]
             IR[0]
             IR[1]
             IR[2]
             IR[3]
             DEVICEADDRTYPE
             DEVICEADDR[0]
             DEVICEADDR[1]
             INFO.PART
             INFO.VARIANT
             INFO.PACKAGE
             INFO.RAM
             INFO.FLASH
             TEMP.A0
             TEMP.A1
             TEMP.A2
             TEMP.A3
             TEMP.A4
             TEMP.A5
             TEMP.B0
             TEMP.B1
             TEMP.B2
             TEMP.B3
             TEMP.B4
             TEMP.B5
             TEMP.T0
             TEMP.T1
             TEMP.T2
             TEMP.T3
             TEMP.T4
        UICR — User information configuration registers
           Registers
             NRFFW[0]
             NRFFW[1]
             NRFFW[2]
             NRFFW[3]
             NRFFW[4]
             NRFFW[5]
             NRFFW[6]
             NRFFW[7]
             NRFFW[8]
             NRFFW[9]
             NRFFW[10]
             NRFFW[11]
             NRFFW[12]
             NRFFW[13]
             NRFFW[14]
             NRFHW[0]
             NRFHW[1]
             NRFHW[2]
             NRFHW[3]
             NRFHW[4]
             NRFHW[5]
             NRFHW[6]
             NRFHW[7]
             NRFHW[8]
             NRFHW[9]
             NRFHW[10]
             NRFHW[11]
             CUSTOMER[0]
             CUSTOMER[1]
             CUSTOMER[2]
             CUSTOMER[3]
             CUSTOMER[4]
             CUSTOMER[5]
             CUSTOMER[6]
             CUSTOMER[7]
             CUSTOMER[8]
             CUSTOMER[9]
             CUSTOMER[10]
             CUSTOMER[11]
             CUSTOMER[12]
             CUSTOMER[13]
             CUSTOMER[14]
             CUSTOMER[15]
             CUSTOMER[16]
             CUSTOMER[17]
             CUSTOMER[18]
             CUSTOMER[19]
             CUSTOMER[20]
             CUSTOMER[21]
             CUSTOMER[22]
             CUSTOMER[23]
             CUSTOMER[24]
             CUSTOMER[25]
             CUSTOMER[26]
             CUSTOMER[27]
             CUSTOMER[28]
             CUSTOMER[29]
             CUSTOMER[30]
             CUSTOMER[31]
             PSELRESET[0]
             PSELRESET[1]
             APPROTECT
        EasyDMA
          EasyDMA array list
        AHB multilayer
        Debug
          DAP - Debug Access Port
          CTRL-AP - Control Access Port
             Registers
               RESET
               ERASEALL
               ERASEALLSTATUS
               APPROTECTSTATUS
               IDR
             Electrical specification
               Control access port
          Debug interface mode
          Real-time debug
      Power and clock management
        Power management unit (PMU)
        Current consumption
           Electrical specification
             CPU running
             Radio transmitting/receiving
             Sleep
             Compounded
             TIMER running
             RNG active
             TEMP active
             SAADC active
             COMP active
             WDT active
        POWER — Power supply
          Regulators
          System OFF mode
            Emulated System OFF mode
          System ON mode
            Sub power modes
          Power supply supervisor
            Power-fail comparator
          RAM sections
          Reset
            Power-on reset
            Pin reset
            Wakeup from System OFF mode reset
            Soft reset
            Watchdog reset
            Brown-out reset
          Retained registers
          Reset behavior
           Registers
             INTENSET
             INTENCLR
             RESETREAS
             SYSTEMOFF
             POFCON
             GPREGRET
             GPREGRET2
             DCDCEN
             RAM[0].POWER
             RAM[0].POWERSET
             RAM[0].POWERCLR
             RAM[1].POWER
             RAM[1].POWERSET
             RAM[1].POWERCLR
             RAM[2].POWER
             RAM[2].POWERSET
             RAM[2].POWERCLR
             RAM[3].POWER
             RAM[3].POWERSET
             RAM[3].POWERCLR
             RAM[4].POWER
             RAM[4].POWERSET
             RAM[4].POWERCLR
             RAM[5].POWER
             RAM[5].POWERSET
             RAM[5].POWERCLR
             RAM[6].POWER
             RAM[6].POWERSET
             RAM[6].POWERCLR
             RAM[7].POWER
             RAM[7].POWERSET
             RAM[7].POWERCLR
           Electrical specification
             Device startup times
             Power fail comparator
        CLOCK — Clock control
          HFCLK clock controller
            64 MHz crystal oscillator (HFXO)
          LFCLK clock controller
            32.768 kHz RC oscillator (LFRC)
            Calibrating the 32.768 kHz RC oscillator
            Calibration timer
            32.768 kHz crystal oscillator (LFXO)
            32.768 kHz synthesized from HFCLK (LFSYNT)
           Registers
             INTENSET
             INTENCLR
             HFCLKRUN
             HFCLKSTAT
             LFCLKRUN
             LFCLKSTAT
             LFCLKSRCCOPY
             LFCLKSRC
             CTIV ( Retained )
           Electrical specification
             64 MHz internal oscillator (HFINT)
             64 MHz crystal oscillator (HFXO)
             32.768 kHz RC oscillator (LFRC)
             32.768 kHz crystal oscillator (LFXO)
             32.768 kHz synthesized from HFCLK (LFSYNT)
      Peripherals
        Peripheral interface
          Peripheral ID
          Peripherals with shared ID
          Peripheral registers
          Bit set and clear
          Tasks
          Events
          Shortcuts
          Interrupts
        AAR — Accelerated address resolver
          EasyDMA
          Resolving a resolvable address
          Use case example for chaining RADIO packet reception with address resolution using AAR
          IRK data structure
           Registers
             INTENSET
             INTENCLR
             STATUS
             ENABLE
             NIRK
             IRKPTR
             ADDRPTR
             SCRATCHPTR
           Electrical specification
             AAR Electrical Specification
        BPROT — Block protection
           Registers
             CONFIG0
             CONFIG1
             DISABLEINDEBUG
        CCM — AES CCM mode encryption
          Key-steam generation
          Encryption
          Decryption
          AES CCM and RADIO concurrent operation
          Encrypting packets on-the-fly in radio transmit mode
          Decrypting packets on-the-fly in radio receive mode
          CCM data structure
          EasyDMA and ERROR event
           Registers
             SHORTS
             INTENSET
             INTENCLR
             MICSTATUS
             ENABLE
             MODE
             CNFPTR
             INPTR
             OUTPTR
             SCRATCHPTR
             MAXPACKETSIZE
             RATEOVERRIDE
           Electrical specification
             Timing specification
        COMP — Comparator
          Differential mode
          Single-ended mode
           Registers
             SHORTS
             INTEN
             INTENSET
             INTENCLR
             RESULT
             ENABLE
             PSEL
             REFSEL
             EXTREFSEL
             TH
             MODE
             HYST
           Electrical specification
             COMP Electrical Specification
        ECB — AES electronic codebook mode encryption
          Shared resources
          EasyDMA
          ECB data structure
           Registers
             INTENSET
             INTENCLR
             ECBDATAPTR
           Electrical specification
             ECB Electrical Specification
        EGU — Event generator unit
           Registers
             INTEN
             INTENSET
             INTENCLR
           Electrical specification
             EGU Electrical Specification
        GPIO — General purpose input/output
          Pin configuration
           Registers
             OUT
             OUTSET
             OUTCLR
             IN
             DIR
             DIRSET
             DIRCLR
             LATCH
             DETECTMODE
             PIN_CNF[0]
             PIN_CNF[1]
             PIN_CNF[2]
             PIN_CNF[3]
             PIN_CNF[4]
             PIN_CNF[5]
             PIN_CNF[6]
             PIN_CNF[7]
             PIN_CNF[8]
             PIN_CNF[9]
             PIN_CNF[10]
             PIN_CNF[11]
             PIN_CNF[12]
             PIN_CNF[13]
             PIN_CNF[14]
             PIN_CNF[15]
             PIN_CNF[16]
             PIN_CNF[17]
             PIN_CNF[18]
             PIN_CNF[19]
             PIN_CNF[20]
             PIN_CNF[21]
             PIN_CNF[22]
             PIN_CNF[23]
             PIN_CNF[24]
             PIN_CNF[25]
             PIN_CNF[26]
             PIN_CNF[27]
             PIN_CNF[28]
             PIN_CNF[29]
             PIN_CNF[30]
             PIN_CNF[31]
           Electrical specification
             GPIO Electrical Specification
        GPIOTE — GPIO tasks and events
          Pin events and tasks
          Port event
          Tasks and events pin configuration
           Registers
             INTENSET
             INTENCLR
             CONFIG[0]
             CONFIG[1]
             CONFIG[2]
             CONFIG[3]
             CONFIG[4]
             CONFIG[5]
             CONFIG[6]
             CONFIG[7]
           Electrical specification
        PDM — Pulse density modulation interface
          Master clock generator
          Module operation
          Decimation filter
          EasyDMA
          Hardware example
          Pin configuration
           Registers
             INTEN
             INTENSET
             INTENCLR
             ENABLE
             PDMCLKCTRL
             MODE
             GAINL
             GAINR
             PSEL.CLK
             PSEL.DIN
             SAMPLE.PTR
             SAMPLE.MAXCNT
           Electrical specification
             PDM Electrical Specification
        PPI — Programmable peripheral interconnect
          Pre-programmed channels
           Registers
             CHEN
             CHENSET
             CHENCLR
             CH[0].EEP
             CH[0].TEP
             CH[1].EEP
             CH[1].TEP
             CH[2].EEP
             CH[2].TEP
             CH[3].EEP
             CH[3].TEP
             CH[4].EEP
             CH[4].TEP
             CH[5].EEP
             CH[5].TEP
             CH[6].EEP
             CH[6].TEP
             CH[7].EEP
             CH[7].TEP
             CH[8].EEP
             CH[8].TEP
             CH[9].EEP
             CH[9].TEP
             CH[10].EEP
             CH[10].TEP
             CH[11].EEP
             CH[11].TEP
             CH[12].EEP
             CH[12].TEP
             CH[13].EEP
             CH[13].TEP
             CH[14].EEP
             CH[14].TEP
             CH[15].EEP
             CH[15].TEP
             CH[16].EEP
             CH[16].TEP
             CH[17].EEP
             CH[17].TEP
             CH[18].EEP
             CH[18].TEP
             CH[19].EEP
             CH[19].TEP
             CHG[0]
             CHG[1]
             CHG[2]
             CHG[3]
             CHG[4]
             CHG[5]
             FORK[0].TEP
             FORK[1].TEP
             FORK[2].TEP
             FORK[3].TEP
             FORK[4].TEP
             FORK[5].TEP
             FORK[6].TEP
             FORK[7].TEP
             FORK[8].TEP
             FORK[9].TEP
             FORK[10].TEP
             FORK[11].TEP
             FORK[12].TEP
             FORK[13].TEP
             FORK[14].TEP
             FORK[15].TEP
             FORK[16].TEP
             FORK[17].TEP
             FORK[18].TEP
             FORK[19].TEP
             FORK[20].TEP
             FORK[21].TEP
             FORK[22].TEP
             FORK[23].TEP
             FORK[24].TEP
             FORK[25].TEP
             FORK[26].TEP
             FORK[27].TEP
             FORK[28].TEP
             FORK[29].TEP
             FORK[30].TEP
             FORK[31].TEP
        PWM — Pulse width modulation
          Wave counter
          Decoder with EasyDMA
          Limitations
          Pin configuration
           Registers
             SHORTS
             INTEN
             INTENSET
             INTENCLR
             ENABLE
             MODE
             COUNTERTOP
             PRESCALER
             DECODER
             LOOP
             SEQ[0].PTR
             SEQ[0].CNT
             SEQ[0].REFRESH
             SEQ[0].ENDDELAY
             SEQ[1].PTR
             SEQ[1].CNT
             SEQ[1].REFRESH
             SEQ[1].ENDDELAY
             PSEL.OUT[0]
             PSEL.OUT[1]
             PSEL.OUT[2]
             PSEL.OUT[3]
           Electrical specification
        QDEC — Quadrature decoder
          Sampling and decoding
          LED output
          Debounce filters
          Accumulators
          Output/input pins
          Pin configuration
           Registers
             SHORTS
             INTENSET
             INTENCLR
             ENABLE
             LEDPOL
             SAMPLEPER
             SAMPLE
             REPORTPER
             ACC
             ACCREAD
             PSEL.LED
             PSEL.A
             PSEL.B
             DBFEN
             LEDPRE
             ACCDBL
             ACCDBLREAD
           Electrical specification
             QDEC Electrical Specification
        RADIO — 2.4 GHz radio
          EasyDMA
          Packet configuration
          Maximum packet length
          Address configuration
          Data whitening
          CRC
          Radio states
          Transmit sequence
          Receive sequence
          Received signal strength indicator (RSSI)
          Interframe spacing
          Device address match
          Bit counter
           Registers
             SHORTS
             INTENSET
             INTENCLR
             CRCSTATUS
             RXMATCH
             RXCRC
             DAI
             PACKETPTR
             FREQUENCY
             TXPOWER
             MODE
             PCNF0
             PCNF1
             BASE0
             BASE1
             PREFIX0
             PREFIX1
             TXADDRESS
             RXADDRESSES
             CRCCNF
             CRCPOLY
             CRCINIT
             TIFS
             RSSISAMPLE
             STATE
             DATAWHITEIV
             BCC
             DAB[0]
             DAB[1]
             DAB[2]
             DAB[3]
             DAB[4]
             DAB[5]
             DAB[6]
             DAB[7]
             DAP[0]
             DAP[1]
             DAP[2]
             DAP[3]
             DAP[4]
             DAP[5]
             DAP[6]
             DAP[7]
             DACNF
             MODECNF0
             POWER
           Electrical specification
             General radio characteristics
             Radio current consumption (transmitter)
             Radio current consumption (receiver)
             Transmitter specification
             Receiver operation
             RX selectivity
             RX intermodulation
             Radio timing
             Received Signal Strength Indicator (RSSI) specifications
             Jitter
        RNG — Random number generator
          Bias correction
          Speed
           Registers
             SHORTS
             INTENSET
             INTENCLR
             CONFIG
             VALUE
           Electrical specification
             RNG Electrical Specification
        RTC — Real-time counter
          Clock source
          Resolution versus overflow and the PRESCALER
          COUNTER register
          Overflow features
          TICK event
          Event control feature
          Compare feature
          TASK and EVENT jitter/delay
          Reading the COUNTER register
           Registers
             INTENSET
             INTENCLR
             EVTEN
             EVTENSET
             EVTENCLR
             COUNTER
             PRESCALER
             CC[0]
             CC[1]
             CC[2]
             CC[3]
           Electrical specification
        SAADC — Successive approximation analog-to-digital converter
          Shared resources
          Overview
          Digital output
          Analog inputs and channels
          Operation modes
            One-shot mode
            Continuous mode
            Oversampling
            Scan mode
          EasyDMA
          Resistor ladder
          Reference
          Acquisition time
          Limits event monitoring
           Registers
             INTEN
             INTENSET
             INTENCLR
             STATUS
             ENABLE
             CH[0].PSELP
             CH[0].PSELN
             CH[0].CONFIG
             CH[0].LIMIT
             CH[1].PSELP
             CH[1].PSELN
             CH[1].CONFIG
             CH[1].LIMIT
             CH[2].PSELP
             CH[2].PSELN
             CH[2].CONFIG
             CH[2].LIMIT
             CH[3].PSELP
             CH[3].PSELN
             CH[3].CONFIG
             CH[3].LIMIT
             CH[4].PSELP
             CH[4].PSELN
             CH[4].CONFIG
             CH[4].LIMIT
             CH[5].PSELP
             CH[5].PSELN
             CH[5].CONFIG
             CH[5].LIMIT
             CH[6].PSELP
             CH[6].PSELN
             CH[6].CONFIG
             CH[6].LIMIT
             CH[7].PSELP
             CH[7].PSELN
             CH[7].CONFIG
             CH[7].LIMIT
             RESOLUTION
             OVERSAMPLE
             SAMPLERATE
             RESULT.PTR
             RESULT.MAXCNT
             RESULT.AMOUNT
           Electrical specification
             SAADC Electrical Specification
          Performance factors
        SPIM — Serial peripheral interface master with EasyDMA
          SPI master transaction sequence
          Master mode pin configuration
          EasyDMA
            EasyDMA array list
          Low power
           Registers
             SHORTS
             INTENSET
             INTENCLR
             ENABLE
             PSEL.SCK
             PSEL.MOSI
             PSEL.MISO
             FREQUENCY
             RXD.PTR
             RXD.MAXCNT
             RXD.AMOUNT
             RXD.LIST
             TXD.PTR
             TXD.MAXCNT
             TXD.AMOUNT
             TXD.LIST
             CONFIG
             ORC
           Electrical specification
             SPIM master interface electrical specifications
             Serial Peripheral Interface Master (SPIM) timing specifications
        SPIS — Serial peripheral interface slave with EasyDMA
          Shared resources
          EasyDMA
          SPI slave operation
          Pin configuration
           Registers
             SHORTS
             INTENSET
             INTENCLR
             SEMSTAT
             STATUS
             ENABLE
             PSELSCK ( Deprecated )
             PSELMISO ( Deprecated )
             PSELMOSI ( Deprecated )
             PSELCSN ( Deprecated )
             PSEL.SCK
             PSEL.MISO
             PSEL.MOSI
             PSEL.CSN
             RXDPTR ( Deprecated )
             MAXRX ( Deprecated )
             AMOUNTRX ( Deprecated )
             RXD.PTR
             RXD.MAXCNT
             RXD.AMOUNT
             TXDPTR ( Deprecated )
             MAXTX ( Deprecated )
             AMOUNTTX ( Deprecated )
             TXD.PTR
             TXD.MAXCNT
             TXD.AMOUNT
             CONFIG
             DEF
             ORC
           Electrical specification
             SPIS slave interface electrical specifications
             Serial Peripheral Interface Slave (SPIS) timing specifications
        SWI — Software interrupts
           Registers
        TEMP — Temperature sensor
           Registers
             INTENSET
             INTENCLR
             TEMP
             A0
             A1
             A2
             A3
             A4
             A5
             B0
             B1
             B2
             B3
             B4
             B5
             T0
             T1
             T2
             T3
             T4
           Electrical specification
             Temperature Sensor Electrical Specification
        TIMER — Timer/counter
          Capture
          Compare
          Task delays
          Task priority
           Registers
             SHORTS
             INTENSET
             INTENCLR
             MODE
             BITMODE
             PRESCALER
             CC[0]
             CC[1]
             CC[2]
             CC[3]
             CC[4]
             CC[5]
        TWIM — I2C compatible two-wire interface master with EasyDMA
          EasyDMA
          Master write sequence
          Master read sequence
          Master repeated start sequence
          Low power
          Master mode pin configuration
           Registers
             SHORTS
             INTEN
             INTENSET
             INTENCLR
             ERRORSRC
             ENABLE
             PSEL.SCL
             PSEL.SDA
             FREQUENCY
             RXD.PTR
             RXD.MAXCNT
             RXD.AMOUNT
             RXD.LIST
             TXD.PTR
             TXD.MAXCNT
             TXD.AMOUNT
             TXD.LIST
             ADDRESS
           Electrical specification
             TWIM interface electrical specifications
             Two Wire Interface Master (TWIM) timing specifications
          Pullup resistor
        TWIS — I2C compatible two-wire interface slave with EasyDMA
          EasyDMA
          TWI slave responding to a read command
          TWI slave responding to a write command
          Master repeated start sequence
          Terminating an ongoing TWI transaction
          Low power
          Slave mode pin configuration
           Registers
             SHORTS
             INTEN
             INTENSET
             INTENCLR
             ERRORSRC
             MATCH
             ENABLE
             PSEL.SCL
             PSEL.SDA
             RXD.PTR
             RXD.MAXCNT
             RXD.AMOUNT
             TXD.PTR
             TXD.MAXCNT
             TXD.AMOUNT
             ADDRESS[0]
             ADDRESS[1]
             CONFIG
             ORC
           Electrical specification
             TWIS slave timing specifications
        UARTE — Universal asynchronous receiver/transmitter with EasyDMA
          EasyDMA
          Transmission
          Reception
          Error conditions
          Using the UARTE without flow control
          Parity and stop bit configuration
          Low power
          Pin configuration
           Registers
             SHORTS
             INTEN
             INTENSET
             INTENCLR
             ERRORSRC
             ENABLE
             PSEL.RTS
             PSEL.TXD
             PSEL.CTS
             PSEL.RXD
             BAUDRATE
             RXD.PTR
             RXD.MAXCNT
             RXD.AMOUNT
             TXD.PTR
             TXD.MAXCNT
             TXD.AMOUNT
             CONFIG
           Electrical specification
             UARTE electrical specification
        WDT — Watchdog timer
          Reload criteria
          Temporarily pausing the watchdog
          Watchdog reset
           Registers
             INTENSET
             INTENCLR
             RUNSTATUS
             REQSTATUS
             CRV
             RREN
             CONFIG
             RR[0]
             RR[1]
             RR[2]
             RR[3]
             RR[4]
             RR[5]
             RR[6]
             RR[7]
           Electrical specification
             Watchdog Timer Electrical Specification
      Hardware and layout
        Pin assignments
          QFN48 pin assignments
          QFN32 pin assignments
          GPIO pins located near the radio
        Mechanical specifications
          QFN48 6 x 6 mm package
          QFN32 5 x 5 mm package
        Reference circuitry
          Schematic QFAA QFN48 with internal LDO setup
          Schematic QFAA QFN48 with DC/DC regulator setup
          Schematic QCAA QFN32 with internal LDO setup
          Schematic QCAA QFN32 with DC/DC regulator setup
          PCB guidelines
          PCB layout example
      Recommended operating conditions
      Absolute maximum ratings
      Ordering information
        IC marking
        Box labels
        Order code
        Code ranges and values
        Product options
      Liability disclaimer
    Errata
      nRF52810 Rev 1 Errata
        Change log
        New and inherited anomalies
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [36] CLOCK: Some registers are not reset when expected
          [66] TEMP: Linearity specification not met with default settings
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [77] CLOCK: RC oscillator is not calibrated when first started
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [103] CCM: Reset value of CCM.MAXPACKETSIZE causes encryption, decryption, and MIC failures
          [136] System: Bits in RESETREAS are set when they should not be
          [150] SAADC: EVENT_STARTED does not fire
          [155] GPIOTE: IN event may occur more than once on input edge
          [156] GPIOTE: Some CLR tasks give unintentional behavior
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [183] PWM: False SEQEND[0] and SEQEND[1] events
          [184] NVMC: Erase or write operations from the external debugger fail when CPU is not halted
      nRF52810 Engineering A Errata
        Change log
        New and inherited anomalies
          [15] POWER: RAM[x].POWERSET/CLR read as zero
          [20] RTC: Register values are invalid
          [31] CLOCK: Calibration values are not correctly loaded from FICR at reset
          [36] CLOCK: Some registers are not reset when expected
          [66] TEMP: Linearity specification not met with default settings
          [68] CLOCK: EVENTS_HFCLKSTARTED can be generated before HFCLK is stable
          [77] CLOCK: RC oscillator is not calibrated when first started
          [81] GPIO: PIN_CNF is not retained when in debug interface mode
          [83] TWIS: STOPPED event occurs twice if the STOP task is triggered during a transaction
          [88] WDT: Increased current consumption when configured to pause in System ON idle
          [103] CCM: Reset value of CCM.MAXPACKETSIZE causes encryption, decryption, and MIC failures
          [136] System: Bits in RESETREAS are set when they should not be
          [150] SAADC: EVENT_STARTED does not fire
          [155] GPIOTE: IN event may occur more than once on input edge
          [156] GPIOTE: Some CLR tasks give unintentional behavior
          [173] GPIO: Writes to LATCH register take several CPU cycles to take effect
          [176] System: Flash erase through CTRL-AP fails due to watchdog time-out
          [179] RTC: COMPARE event is generated twice from a single RTC compare match
          [183] PWM: False SEQEND[0] and SEQEND[1] events
          [184] NVMC: Erase or write operations from the external debugger fail when CPU is not halted
    Product Change Notification
    Compatibility Matrix
      IC revision overview
      Documentation and reference design files overview
      IC revisions, SDK, and SoftDevice compatibility matrix
      IC revisions compatibility with development HW
      Bluetooth low energy QDID matrix
      Revision history
    nRF52810 Development Kit
  SoftDevices
    S112 SoftDevice
      S112 SoftDevice Specification
        Revision history
        Documentation
        Product overview
        Application Programming Interface (API)
          Events - SoftDevice to application
          Error handling
        SoftDevice Manager
          SoftDevice enable and disable
          Clock source
          Power management
          Memory isolation
        System on Chip (SoC) library
        System on Chip resource requirements
          Hardware peripherals
          Application signals – software interrupts (SWI)
          Programmable peripheral interconnect (PPI)
          SVC number ranges
          External and miscellaneous requirements
        Flash memory API
        Multiprotocol support
          Non-concurrent multiprotocol implementation
          Concurrent multiprotocol implementation using the Radio Timeslot API
            Request types
            Request priorities
            Timeslot length
            Scheduling
            High frequency clock configuration
            Performance considerations
            Radio Timeslot API
              API calls
              Radio Timeslot events
              Radio Timeslot signals
              Signal handler return actions
              Ending a timeslot in time
              Signal handler considerations
          Radio Timeslot API usage scenarios
            Complete session example
            Blocked timeslot scenario
            Canceled timeslot scenario
            Radio Timeslot extension example
        Bluetooth low energy protocol stack
          Profile and service support
          Bluetooth low energy features
          Limitations on procedure concurrency
          Bluetooth low energy role configuration
        Radio Notification
          Radio Notification signals
          Radio Notification on connection events as a Peripheral
          Radio Notification with concurrent peripheral events
          Radio Notification with Connection Event Length Extension
          Power Amplifier and Low Noise Amplifier control configuration (PA/LNA)
        Master Boot Record and bootloader
          Master Boot Record
          Bootloader
          Master Boot Record (MBR) and SoftDevice reset procedure
          Master Boot Record (MBR) and SoftDevice initialization procedure
        SoftDevice information structure
        SoftDevice memory usage
          Memory resource map and usage
            Memory resource requirements
          Attribute table size
          Role configuration
          Vendor specific UUID counts
        Scheduling
          SoftDevice timing-activities and priorities
          Advertiser (connectable and non-connectable) timing
          Peripheral connection setup and connection timing
          Connection timing with Connection Event Length Extension
          Flash API timing
          Timeslot API timing
          Suggested intervals and windows
        Interrupt model and processor availability
          Exception model
            Interrupt forwarding to the application
            Interrupt latency due to System on Chip (SoC) framework
          Interrupt priority levels
          Processor usage patterns and availability
            Flash API processor usage patterns
            Radio Timeslot API processor usage patterns
            Bluetooth low energy processor usage patterns
              Bluetooth low energy Advertiser (Broadcaster) processor usage patterns
              Bluetooth low energy peripheral connection processor usage patterns
            Interrupt latency when using multiple modules and roles
        Bluetooth low energy data throughput
        Bluetooth low energy power profiles
          Advertising event
          Peripheral connection event
        SoftDevice identification and revision scheme
          MBR distribution and revision scheme
        Legal notices
      S112 SoftDevice API
        S112 SoftDevice v5.1.0 API
          S112 SoftDevice v5.1.0 API
          Message Sequence Charts
          API Reference
            BLE SoftDevice Common
              Bluetooth status codes
                BLE_HCI_AUTHENTICATION_FAILURE
                BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED
                BLE_HCI_CONN_INTERVAL_UNACCEPTABLE
                BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE
                BLE_HCI_CONNECTION_TIMEOUT
                BLE_HCI_CONTROLLER_BUSY
                BLE_HCI_DIFFERENT_TRANSACTION_COLLISION
                BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT
                BLE_HCI_INSTANT_PASSED
                BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION
                BLE_HCI_MEMORY_CAPACITY_EXCEEDED
                BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED
                BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE
                BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES
                BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF
                BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION
                BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED
                BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS
                BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS
                BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION
                BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED
                BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT
                BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING
                BLE_HCI_STATUS_CODE_SUCCESS
                BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND
                BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER
                BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR
                BLE_HCI_UNSUPPORTED_REMOTE_FEATURE
              Common types and macro definitions
                Defines
                  Assigned Values for BLE UUIDs
                    BLE_UUID_CHARACTERISTIC
                    BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT
                    BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP
                    BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT
                    BLE_UUID_DESCRIPTOR_CHAR_USER_DESC
                    BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG
                    BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG
                    BLE_UUID_GAP
                    BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE
                    BLE_UUID_GAP_CHARACTERISTIC_CAR
                    BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME
                    BLE_UUID_GAP_CHARACTERISTIC_PPCP
                    BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR
                    BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY
                    BLE_UUID_GATT
                    BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED
                    BLE_UUID_SERVICE_INCLUDE
                    BLE_UUID_SERVICE_PRIMARY
                    BLE_UUID_SERVICE_SECONDARY
                    BLE_UUID_UNKNOWN
                  BLE Connection Handles
                    BLE_CONN_HANDLE_ALL
                    BLE_CONN_HANDLE_INVALID
                  Bluetooth Appearance values
                    BLE_APPEARANCE_BLOOD_PRESSURE_ARM
                    BLE_APPEARANCE_BLOOD_PRESSURE_WRIST
                    BLE_APPEARANCE_CYCLING_CADENCE_SENSOR
                    BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER
                    BLE_APPEARANCE_CYCLING_POWER_SENSOR
                    BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR
                    BLE_APPEARANCE_CYCLING_SPEED_SENSOR
                    BLE_APPEARANCE_GENERIC_BARCODE_SCANNER
                    BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE
                    BLE_APPEARANCE_GENERIC_CLOCK
                    BLE_APPEARANCE_GENERIC_COMPUTER
                    BLE_APPEARANCE_GENERIC_CYCLING
                    BLE_APPEARANCE_GENERIC_DISPLAY
                    BLE_APPEARANCE_GENERIC_EYE_GLASSES
                    BLE_APPEARANCE_GENERIC_GLUCOSE_METER
                    BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR
                    BLE_APPEARANCE_GENERIC_HID
                    BLE_APPEARANCE_GENERIC_KEYRING
                    BLE_APPEARANCE_GENERIC_MEDIA_PLAYER
                    BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT
                    BLE_APPEARANCE_GENERIC_PHONE
                    BLE_APPEARANCE_GENERIC_PULSE_OXIMETER
                    BLE_APPEARANCE_GENERIC_REMOTE_CONTROL
                    BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR
                    BLE_APPEARANCE_GENERIC_TAG
                    BLE_APPEARANCE_GENERIC_THERMOMETER
                    BLE_APPEARANCE_GENERIC_WATCH
                    BLE_APPEARANCE_GENERIC_WEIGHT_SCALE
                    BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT
                    BLE_APPEARANCE_HID_BARCODE
                    BLE_APPEARANCE_HID_CARD_READER
                    BLE_APPEARANCE_HID_DIGITAL_PEN
                    BLE_APPEARANCE_HID_DIGITIZERSUBTYPE
                    BLE_APPEARANCE_HID_GAMEPAD
                    BLE_APPEARANCE_HID_JOYSTICK
                    BLE_APPEARANCE_HID_KEYBOARD
                    BLE_APPEARANCE_HID_MOUSE
                    BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP
                    BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD
                    BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP
                    BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD
                    BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP
                    BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN
                    BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE
                    BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP
                    BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE
                    BLE_APPEARANCE_THERMOMETER_EAR
                    BLE_APPEARANCE_UNKNOWN
                    BLE_APPEARANCE_WATCH_SPORTS_WATCH
                  Types of UUID
                    BLE_UUID_TYPE_BLE
                    BLE_UUID_TYPE_UNKNOWN
                    BLE_UUID_TYPE_VENDOR_BEGIN
                  BLE_UUID_BLE_ASSIGN
                  BLE_UUID_COPY_INST
                  BLE_UUID_COPY_PTR
                  BLE_UUID_EQ
                  BLE_UUID_NEQ
                Structures
                  ble_uuid128_t
                    uuid128
                  ble_uuid_t
                    type
                    uuid
                  ble_data_t
                    len
                    p_data
              Events, type definitions and API calls
                Defines
                  Configuration defaults.
                    BLE_CONN_CFG_TAG_DEFAULT
                  User Memory Types
                    BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES
                    BLE_USER_MEM_TYPE_INVALID
                  Vendor Specific UUID counts
                    BLE_UUID_VS_COUNT_DEFAULT
                    BLE_UUID_VS_COUNT_MAX
                  BLE_EVT_LEN_MAX
                  BLE_EVT_PTR_ALIGNMENT
                  BLE_MAX
                Enumerations
                  BLE_COMMON_CFGS
                    BLE_COMMON_CFG_VS_UUID
                  BLE_COMMON_EVTS
                    BLE_EVT_USER_MEM_REQUEST
                    BLE_EVT_USER_MEM_RELEASE
                  BLE_COMMON_OPTS
                    BLE_COMMON_OPT_PA_LNA
                    BLE_COMMON_OPT_CONN_EVT_EXT
                  BLE_COMMON_SVCS
                    SD_BLE_ENABLE
                    SD_BLE_EVT_GET
                    SD_BLE_UUID_VS_ADD
                    SD_BLE_UUID_DECODE
                    SD_BLE_UUID_ENCODE
                    SD_BLE_VERSION_GET
                    SD_BLE_USER_MEM_REPLY
                    SD_BLE_OPT_SET
                    SD_BLE_OPT_GET
                    SD_BLE_CFG_SET
                  BLE_CONN_CFGS
                    BLE_CONN_CFG_GAP
                    BLE_CONN_CFG_GATTC
                    BLE_CONN_CFG_GATTS
                    BLE_CONN_CFG_GATT
                Functions
                  sd_ble_cfg_set
                  sd_ble_enable
                  sd_ble_evt_get
                  sd_ble_opt_get
                  sd_ble_opt_set
                  sd_ble_user_mem_reply
                  sd_ble_uuid_decode
                  sd_ble_uuid_encode
                  sd_ble_uuid_vs_add
                  sd_ble_version_get
                Structures
                  ble_user_mem_block_t
                    len
                    p_mem
                  ble_evt_user_mem_request_t
                    type
                  ble_evt_user_mem_release_t
                    mem_block
                    type
                  ble_common_evt_t
                    conn_handle
                    params
                    user_mem_release
                    user_mem_request
                  ble_evt_hdr_t
                    evt_id
                    evt_len
                  ble_evt_t
                    common_evt
                    evt
                    gap_evt
                    gattc_evt
                    gatts_evt
                    header
                  ble_version_t
                    company_id
                    subversion_number
                    version_number
                  ble_pa_lna_cfg_t
                    active_high
                    enable
                    gpio_pin
                  ble_common_opt_pa_lna_t
                    gpiote_ch_id
                    lna_cfg
                    pa_cfg
                    ppi_ch_id_clr
                    ppi_ch_id_set
                  ble_common_opt_conn_evt_ext_t
                    enable
                  ble_common_opt_t
                    conn_evt_ext
                    pa_lna
                  ble_opt_t
                    common_opt
                    gap_opt
                  ble_conn_cfg_t
                    conn_cfg_tag
                    gap_conn_cfg
                    gatt_conn_cfg
                    gattc_conn_cfg
                    gatts_conn_cfg
                    params
                  ble_common_cfg_vs_uuid_t
                    vs_uuid_count
                  ble_common_cfg_t
                    vs_uuid_cfg
                  ble_cfg_t
                    common_cfg
                    conn_cfg
                    gap_cfg
                    gatts_cfg
              General error codes
                BLE_ERROR_INVALID_ATTR_HANDLE
                BLE_ERROR_INVALID_CONN_HANDLE
                BLE_ERROR_INVALID_ROLE
                BLE_ERROR_NOT_ENABLED
              Message Sequence Charts
                BLE Stack Enable
                Connection Configuration
                Interrupt-driven Event Retrieval
                Thread Mode Event Retrieval
              Module specific SVC, event and option number subranges
                BLE_CFG_BASE
                BLE_CFG_INVALID
                BLE_CFG_LAST
                BLE_CONN_CFG_BASE
                BLE_CONN_CFG_LAST
                BLE_EVT_BASE
                BLE_EVT_INVALID
                BLE_EVT_LAST
                BLE_GAP_CFG_BASE
                BLE_GAP_CFG_LAST
                BLE_GAP_EVT_BASE
                BLE_GAP_EVT_LAST
                BLE_GAP_OPT_BASE
                BLE_GAP_OPT_LAST
                BLE_GAP_SVC_BASE
                BLE_GAP_SVC_LAST
                BLE_GATT_CFG_BASE
                BLE_GATT_CFG_LAST
                BLE_GATT_OPT_BASE
                BLE_GATT_OPT_LAST
                BLE_GATTC_CFG_BASE
                BLE_GATTC_CFG_LAST
                BLE_GATTC_EVT_BASE
                BLE_GATTC_EVT_LAST
                BLE_GATTC_OPT_BASE
                BLE_GATTC_OPT_LAST
                BLE_GATTC_SVC_BASE
                BLE_GATTC_SVC_LAST
                BLE_GATTS_CFG_BASE
                BLE_GATTS_CFG_LAST
                BLE_GATTS_EVT_BASE
                BLE_GATTS_EVT_LAST
                BLE_GATTS_OPT_BASE
                BLE_GATTS_OPT_LAST
                BLE_GATTS_SVC_BASE
                BLE_GATTS_SVC_LAST
                BLE_OPT_BASE
                BLE_OPT_INVALID
                BLE_OPT_LAST
                BLE_SVC_BASE
                BLE_SVC_LAST
              Module specific error code subranges
                NRF_GAP_ERR_BASE
                NRF_GATTC_ERR_BASE
                NRF_GATTS_ERR_BASE
                NRF_L2CAP_ERR_BASE
              SoftDevice Global Error Codes
                Error Codes Base number definitions
                  NRF_ERROR_BASE_NUM
                  NRF_ERROR_SDM_BASE_NUM
                  NRF_ERROR_SOC_BASE_NUM
                  NRF_ERROR_STK_BASE_NUM
                NRF_ERROR_BUSY
                NRF_ERROR_CONN_COUNT
                NRF_ERROR_DATA_SIZE
                NRF_ERROR_FORBIDDEN
                NRF_ERROR_INTERNAL
                NRF_ERROR_INVALID_ADDR
                NRF_ERROR_INVALID_DATA
                NRF_ERROR_INVALID_FLAGS
                NRF_ERROR_INVALID_LENGTH
                NRF_ERROR_INVALID_PARAM
                NRF_ERROR_INVALID_STATE
                NRF_ERROR_NO_MEM
                NRF_ERROR_NOT_FOUND
                NRF_ERROR_NOT_SUPPORTED
                NRF_ERROR_NULL
                NRF_ERROR_RESOURCES
                NRF_ERROR_SOFTDEVICE_NOT_ENABLED
                NRF_ERROR_SVC_HANDLER_MISSING
                NRF_ERROR_TIMEOUT
                NRF_SUCCESS
            Generic Access Profile (GAP)
              Defines
                Authenticated payload timeout defines.
                  BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX
                  BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN
                GAP Address types
                  BLE_GAP_ADDR_TYPE_PUBLIC
                  BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE
                  BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE
                  BLE_GAP_ADDR_TYPE_RANDOM_STATIC
                GAP Advertisement Flags
                  BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED
                  BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER
                  BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST
                  BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE
                  BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE
                  BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE
                  BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE
                GAP Advertising and Scan Response Data format
                  BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE
                  BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE
                  BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE
                  BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE
                  BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE
                  BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE
                  BLE_GAP_AD_TYPE_3D_INFORMATION_DATA
                  BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL
                  BLE_GAP_AD_TYPE_APPEARANCE
                  BLE_GAP_AD_TYPE_CLASS_OF_DEVICE
                  BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME
                  BLE_GAP_AD_TYPE_FLAGS
                  BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS
                  BLE_GAP_AD_TYPE_LE_ROLE
                  BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE
                  BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE
                  BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA
                  BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS
                  BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS
                  BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS
                  BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE
                  BLE_GAP_AD_TYPE_SERVICE_DATA
                  BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID
                  BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID
                  BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME
                  BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C
                  BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256
                  BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R
                  BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256
                  BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE
                  BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT
                  BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT
                  BLE_GAP_AD_TYPE_TX_POWER_LEVEL
                  BLE_GAP_AD_TYPE_URI
                GAP Advertising filter policies
                  BLE_GAP_ADV_FP_ANY
                  BLE_GAP_ADV_FP_FILTER_BOTH
                  BLE_GAP_ADV_FP_FILTER_CONNREQ
                  BLE_GAP_ADV_FP_FILTER_SCANREQ
                GAP Advertising interval max and min
                  BLE_GAP_ADV_INTERVAL_MAX
                  BLE_GAP_ADV_INTERVAL_MIN
                GAP Advertising timeout values
                  BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED
                  BLE_GAP_ADV_TIMEOUT_LIMITED_MAX
                GAP Advertising types
                  BLE_GAP_ADV_TYPE_ADV_DIRECT_IND
                  BLE_GAP_ADV_TYPE_ADV_IND
                  BLE_GAP_ADV_TYPE_ADV_NONCONN_IND
                  BLE_GAP_ADV_TYPE_ADV_SCAN_IND
                GAP Authentication Key Types
                  BLE_GAP_AUTH_KEY_TYPE_NONE
                  BLE_GAP_AUTH_KEY_TYPE_OOB
                  BLE_GAP_AUTH_KEY_TYPE_PASSKEY
                GAP Connection Parameters Limits
                  BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX
                  BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN
                  BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE
                  BLE_GAP_CP_MAX_CONN_INTVL_MAX
                  BLE_GAP_CP_MAX_CONN_INTVL_MIN
                  BLE_GAP_CP_MAX_CONN_INTVL_NONE
                  BLE_GAP_CP_MIN_CONN_INTVL_MAX
                  BLE_GAP_CP_MIN_CONN_INTVL_MIN
                  BLE_GAP_CP_MIN_CONN_INTVL_NONE
                  BLE_GAP_CP_SLAVE_LATENCY_MAX
                GAP Discovery modes
                  BLE_GAP_DISC_MODE_GENERAL
                  BLE_GAP_DISC_MODE_LIMITED
                  BLE_GAP_DISC_MODE_NOT_DISCOVERABLE
                GAP IO Capabilities
                  BLE_GAP_IO_CAPS_DISPLAY_ONLY
                  BLE_GAP_IO_CAPS_DISPLAY_YESNO
                  BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY
                  BLE_GAP_IO_CAPS_KEYBOARD_ONLY
                  BLE_GAP_IO_CAPS_NONE
                GAP Keypress Notification Types
                  BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR
                  BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN
                  BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT
                  BLE_GAP_KP_NOT_TYPE_PASSKEY_END
                  BLE_GAP_KP_NOT_TYPE_PASSKEY_START
                GAP PHYs
                  BLE_GAP_PHY_1MBPS
                  BLE_GAP_PHY_2MBPS
                  BLE_GAP_PHY_AUTO
                  BLE_GAP_PHY_CODED
                GAP Roles
                  BLE_GAP_ROLE_INVALID
                  BLE_GAP_ROLE_PERIPH
                GAP Security Modes
                  BLE_GAP_SEC_MODE
                GAP Security status
                  BLE_GAP_SEC_STATUS_AUTH_REQ
                  BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG
                  BLE_GAP_SEC_STATUS_CONFIRM_VALUE
                  BLE_GAP_SEC_STATUS_DHKEY_FAILURE
                  BLE_GAP_SEC_STATUS_ENC_KEY_SIZE
                  BLE_GAP_SEC_STATUS_INVALID_PARAMS
                  BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE
                  BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE
                  BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP
                  BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED
                  BLE_GAP_SEC_STATUS_PDU_INVALID
                  BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS
                  BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN
                  BLE_GAP_SEC_STATUS_RFU_RANGE1_END
                  BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN
                  BLE_GAP_SEC_STATUS_RFU_RANGE2_END
                  BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED
                  BLE_GAP_SEC_STATUS_SUCCESS
                  BLE_GAP_SEC_STATUS_TIMEOUT
                  BLE_GAP_SEC_STATUS_UNSPECIFIED
                  BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED
                GAP Security status sources
                  BLE_GAP_SEC_STATUS_SOURCE_LOCAL
                  BLE_GAP_SEC_STATUS_SOURCE_REMOTE
                GAP Timeout sources
                  BLE_GAP_TIMEOUT_SRC_ADVERTISING
                  BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD
                  BLE_GAP_TIMEOUT_SRC_CONN
                GAP attribute security requirement setters
                  BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM
                  BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM
                  BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM
                  BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS
                  BLE_GAP_CONN_SEC_MODE_SET_OPEN
                  BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM
                  BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM
                GAP concurrent connection count defines.
                  BLE_GAP_ROLE_COUNT_COMBINED_MAX
                  BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT
                GAP device name defines.
                  BLE_GAP_DEVNAME_DEFAULT
                  BLE_GAP_DEVNAME_DEFAULT_LEN
                  BLE_GAP_DEVNAME_MAX_LEN
                GAP event length defines.
                  BLE_GAP_EVENT_LENGTH_DEFAULT
                  BLE_GAP_EVENT_LENGTH_MIN
                Privacy modes
                  BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY
                  BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY
                  BLE_GAP_PRIVACY_MODE_OFF
                SVC return values specific to GAP
                  BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE
                  BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE
                  BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST
                  BLE_ERROR_GAP_INVALID_BLE_ADDR
                  BLE_ERROR_GAP_UUID_LIST_MISMATCH
                  BLE_ERROR_GAP_WHITELIST_IN_USE
                BLE_GAP_ADDR_LEN
                BLE_GAP_ADV_MAX_SIZE
                BLE_GAP_CONN_COUNT_DEFAULT
                BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S
                BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT
                BLE_GAP_LESC_DHKEY_LEN
                BLE_GAP_LESC_P256_PK_LEN
                BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S
                BLE_GAP_PASSKEY_LEN
                BLE_GAP_RSSI_THRESHOLD_INVALID
                BLE_GAP_SEC_KEY_LEN
                BLE_GAP_SEC_RAND_LEN
                BLE_GAP_WHITELIST_ADDR_MAX_COUNT
              Enumerations
                BLE_GAP_CFGS
                  BLE_GAP_CFG_ROLE_COUNT
                  BLE_GAP_CFG_DEVICE_NAME
                BLE_GAP_EVTS
                  BLE_GAP_EVT_CONNECTED
                  BLE_GAP_EVT_DISCONNECTED
                  BLE_GAP_EVT_CONN_PARAM_UPDATE
                  BLE_GAP_EVT_SEC_PARAMS_REQUEST
                  BLE_GAP_EVT_SEC_INFO_REQUEST
                  BLE_GAP_EVT_PASSKEY_DISPLAY
                  BLE_GAP_EVT_KEY_PRESSED
                  BLE_GAP_EVT_AUTH_KEY_REQUEST
                  BLE_GAP_EVT_LESC_DHKEY_REQUEST
                  BLE_GAP_EVT_AUTH_STATUS
                  BLE_GAP_EVT_CONN_SEC_UPDATE
                  BLE_GAP_EVT_TIMEOUT
                  BLE_GAP_EVT_RSSI_CHANGED
                  BLE_GAP_EVT_SEC_REQUEST
                  BLE_GAP_EVT_SCAN_REQ_REPORT
                  BLE_GAP_EVT_PHY_UPDATE_REQUEST
                  BLE_GAP_EVT_PHY_UPDATE
                BLE_GAP_OPTS
                  BLE_GAP_OPT_CH_MAP
                  BLE_GAP_OPT_LOCAL_CONN_LATENCY
                  BLE_GAP_OPT_PASSKEY
                  BLE_GAP_OPT_SCAN_REQ_REPORT
                  BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT
                  BLE_GAP_OPT_SLAVE_LATENCY_DISABLE
                BLE_GAP_SVCS
                  SD_BLE_GAP_ADDR_SET
                  SD_BLE_GAP_ADDR_GET
                  SD_BLE_GAP_WHITELIST_SET
                  SD_BLE_GAP_DEVICE_IDENTITIES_SET
                  SD_BLE_GAP_PRIVACY_SET
                  SD_BLE_GAP_PRIVACY_GET
                  SD_BLE_GAP_ADV_DATA_SET
                  SD_BLE_GAP_ADV_START
                  SD_BLE_GAP_ADV_STOP
                  SD_BLE_GAP_CONN_PARAM_UPDATE
                  SD_BLE_GAP_DISCONNECT
                  SD_BLE_GAP_TX_POWER_SET
                  SD_BLE_GAP_APPEARANCE_SET
                  SD_BLE_GAP_APPEARANCE_GET
                  SD_BLE_GAP_PPCP_SET
                  SD_BLE_GAP_PPCP_GET
                  SD_BLE_GAP_DEVICE_NAME_SET
                  SD_BLE_GAP_DEVICE_NAME_GET
                  SD_BLE_GAP_AUTHENTICATE
                  SD_BLE_GAP_SEC_PARAMS_REPLY
                  SD_BLE_GAP_AUTH_KEY_REPLY
                  SD_BLE_GAP_LESC_DHKEY_REPLY
                  SD_BLE_GAP_KEYPRESS_NOTIFY
                  SD_BLE_GAP_LESC_OOB_DATA_GET
                  SD_BLE_GAP_LESC_OOB_DATA_SET
                  SD_BLE_GAP_SEC_INFO_REPLY
                  SD_BLE_GAP_CONN_SEC_GET
                  SD_BLE_GAP_RSSI_START
                  SD_BLE_GAP_RSSI_STOP
                  SD_BLE_GAP_RSSI_GET
                  SD_BLE_GAP_PHY_UPDATE
              Functions
                sd_ble_gap_addr_get
                sd_ble_gap_addr_set
                sd_ble_gap_adv_data_set
                sd_ble_gap_adv_start
                sd_ble_gap_adv_stop
                sd_ble_gap_appearance_get
                sd_ble_gap_appearance_set
                sd_ble_gap_auth_key_reply
                sd_ble_gap_authenticate
                sd_ble_gap_conn_param_update
                sd_ble_gap_conn_sec_get
                sd_ble_gap_device_identities_set
                sd_ble_gap_device_name_get
                sd_ble_gap_device_name_set
                sd_ble_gap_disconnect
                sd_ble_gap_keypress_notify
                sd_ble_gap_lesc_dhkey_reply
                sd_ble_gap_lesc_oob_data_get
                sd_ble_gap_lesc_oob_data_set
                sd_ble_gap_phy_update
                sd_ble_gap_ppcp_get
                sd_ble_gap_ppcp_set
                sd_ble_gap_privacy_get
                sd_ble_gap_privacy_set
                sd_ble_gap_rssi_get
                sd_ble_gap_rssi_start
                sd_ble_gap_rssi_stop
                sd_ble_gap_sec_info_reply
                sd_ble_gap_sec_params_reply
                sd_ble_gap_tx_power_set
                sd_ble_gap_whitelist_set
              Message Sequence Charts
                Advertising
                Peripheral Connection Establishment and Termination
                Peripheral Connection Parameter Update
                Peripheral Security Procedures
                  GAP Failed Pairing: Keysize too small
                  Pairing failure: Keysize out of supported range
                  Pairing failure: Pairing aborted by the application
                  Pairing failure: Pairing failed from central
                  Pairing failure: Timeout
                  Peripheral Encryption Establishment using stored keys
                  Peripheral LESC Pairing
                    Bonding: Numeric Comparison
                    Bonding: Out of Band
                    Bonding: Passkey Entry, Peripheral Displays
                    Bonding: Passkey Entry, User Inputs on Peripheral
                    Pairing: Just Works
                  Peripheral Legacy Pairing
                    Bonding: Just Works
                    Bonding: Passkey Entry with static passkey
                    Bonding: Passkey Entry, Peripheral displays
                    Bonding: Passkey Entry, User Inputs on Peripheral or OOB
                    Pairing failure: Confirm failed
                    Pairing: Just Works
                  Peripheral Security Request
                  Unexpected Security Packet Reception
                RSSI for connections with event filter
                RSSI get sample
              Privacy
                Directed Advertising
                Peripheral Connection Establishment with Private Peer
                Peripheral PHY Update
                Private Advertising
              Structures
                ble_gap_addr_t
                  addr
                  addr_id_peer
                  addr_type
                ble_gap_conn_params_t
                  conn_sup_timeout
                  max_conn_interval
                  min_conn_interval
                  slave_latency
                ble_gap_conn_sec_mode_t
                  lv
                  sm
                ble_gap_conn_sec_t
                  encr_key_size
                  sec_mode
                ble_gap_irk_t
                  irk
                ble_gap_adv_ch_mask_t
                  ch_37_off
                  ch_38_off
                  ch_39_off
                ble_gap_adv_params_t
                  channel_mask
                  fp
                  interval
                  p_peer_addr
                  timeout
                  type
                ble_gap_privacy_params_t
                  p_device_irk
                  privacy_mode
                  private_addr_cycle_s
                  private_addr_type
                ble_gap_phys_t
                  rx_phys
                  tx_phys
                ble_gap_sec_kdist_t
                  enc
                  id
                  link
                  sign
                ble_gap_sec_params_t
                  bond
                  io_caps
                  kdist_own
                  kdist_peer
                  keypress
                  lesc
                  max_key_size
                  min_key_size
                  mitm
                  oob
                ble_gap_enc_info_t
                  auth
                  lesc
                  ltk
                  ltk_len
                ble_gap_master_id_t
                  ediv
                  rand
                ble_gap_sign_info_t
                  csrk
                ble_gap_lesc_p256_pk_t
                  pk
                ble_gap_lesc_dhkey_t
                  key
                ble_gap_lesc_oob_data_t
                  addr
                  c
                  r
                ble_gap_evt_connected_t
                  conn_params
                  peer_addr
                  role
                ble_gap_evt_disconnected_t
                  reason
                ble_gap_evt_conn_param_update_t
                  conn_params
                ble_gap_evt_phy_update_request_t
                  peer_preferred_phys
                ble_gap_evt_phy_update_t
                  rx_phy
                  status
                  tx_phy
                ble_gap_evt_sec_params_request_t
                  peer_params
                ble_gap_evt_sec_info_request_t
                  enc_info
                  id_info
                  master_id
                  peer_addr
                  sign_info
                ble_gap_evt_passkey_display_t
                  match_request
                  passkey
                ble_gap_evt_key_pressed_t
                  kp_not
                ble_gap_evt_auth_key_request_t
                  key_type
                ble_gap_evt_lesc_dhkey_request_t
                  oobd_req
                  p_pk_peer
                ble_gap_sec_levels_t
                  lv1
                  lv2
                  lv3
                  lv4
                ble_gap_enc_key_t
                  enc_info
                  master_id
                ble_gap_id_key_t
                  id_addr_info
                  id_info
                ble_gap_sec_keys_t
                  p_enc_key
                  p_id_key
                  p_pk
                  p_sign_key
                ble_gap_sec_keyset_t
                  keys_own
                  keys_peer
                ble_gap_evt_auth_status_t
                  auth_status
                  bonded
                  error_src
                  kdist_own
                  kdist_peer
                  lesc
                  sm1_levels
                  sm2_levels
                ble_gap_evt_conn_sec_update_t
                  conn_sec
                ble_gap_evt_timeout_t
                  src
                ble_gap_evt_rssi_changed_t
                  rssi
                ble_gap_evt_sec_request_t
                  bond
                  keypress
                  lesc
                  mitm
                ble_gap_evt_scan_req_report_t
                  peer_addr
                  rssi
                ble_gap_evt_t
                  auth_key_request
                  auth_status
                  conn_handle
                  conn_param_update
                  conn_sec_update
                  connected
                  disconnected
                  key_pressed
                  lesc_dhkey_request
                  params
                  passkey_display
                  phy_update
                  phy_update_request
                  rssi_changed
                  scan_req_report
                  sec_info_request
                  sec_params_request
                  sec_request
                  timeout
                ble_gap_conn_cfg_t
                  conn_count
                  event_length
                ble_gap_cfg_role_count_t
                  periph_role_count
                ble_gap_cfg_device_name_t
                  current_len
                  max_len
                  p_value
                  vloc
                  write_perm
                ble_gap_cfg_t
                  device_name_cfg
                  role_count_cfg
                ble_gap_opt_ch_map_t
                  ch_map
                  conn_handle
                ble_gap_opt_local_conn_latency_t
                  conn_handle
                  p_actual_latency
                  requested_latency
                ble_gap_opt_slave_latency_disable_t
                  conn_handle
                  disable
                ble_gap_opt_passkey_t
                  p_passkey
                ble_gap_opt_scan_req_report_t
                  enable
                ble_gap_opt_auth_payload_timeout_t
                  auth_payload_timeout
                  conn_handle
                ble_gap_opt_t
                  auth_payload_timeout
                  ch_map
                  local_conn_latency
                  passkey
                  scan_req_report
                  slave_latency_disable
            Generic Attribute Profile (GATT) Client
              Defines
                Attribute Information Formats
                  BLE_GATTC_ATTR_INFO_FORMAT_128BIT
                  BLE_GATTC_ATTR_INFO_FORMAT_16BIT
                GATT Client defaults
                  BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT
                SVC return values specific to GATTC
                  BLE_ERROR_GATTC_PROC_NOT_PERMITTED
              Enumerations
                BLE_GATTC_EVTS
                  BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP
                  BLE_GATTC_EVT_REL_DISC_RSP
                  BLE_GATTC_EVT_CHAR_DISC_RSP
                  BLE_GATTC_EVT_DESC_DISC_RSP
                  BLE_GATTC_EVT_ATTR_INFO_DISC_RSP
                  BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP
                  BLE_GATTC_EVT_READ_RSP
                  BLE_GATTC_EVT_CHAR_VALS_READ_RSP
                  BLE_GATTC_EVT_WRITE_RSP
                  BLE_GATTC_EVT_HVX
                  BLE_GATTC_EVT_EXCHANGE_MTU_RSP
                  BLE_GATTC_EVT_TIMEOUT
                  BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE
                BLE_GATTC_SVCS
                  SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER
                  SD_BLE_GATTC_RELATIONSHIPS_DISCOVER
                  SD_BLE_GATTC_CHARACTERISTICS_DISCOVER
                  SD_BLE_GATTC_DESCRIPTORS_DISCOVER
                  SD_BLE_GATTC_ATTR_INFO_DISCOVER
                  SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ
                  SD_BLE_GATTC_READ
                  SD_BLE_GATTC_CHAR_VALUES_READ
                  SD_BLE_GATTC_WRITE
                  SD_BLE_GATTC_HV_CONFIRM
                  SD_BLE_GATTC_EXCHANGE_MTU_REQUEST
              Functions
                sd_ble_gattc_attr_info_discover
                sd_ble_gattc_char_value_by_uuid_read
                sd_ble_gattc_char_values_read
                sd_ble_gattc_characteristics_discover
                sd_ble_gattc_descriptors_discover
                sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter
                sd_ble_gattc_exchange_mtu_request
                sd_ble_gattc_hv_confirm
                sd_ble_gattc_primary_services_discover
                sd_ble_gattc_read
                sd_ble_gattc_relationships_discover
                sd_ble_gattc_write
              Message Sequence Charts
                GATTC ATT_MTU Exchange
                GATTC Characteristic Discovery
                GATTC Characteristic Value Write Without Response
                GATTC Characteristic or Descriptor Value Long Write
                GATTC Characteristic or Descriptor Value Read
                GATTC Characteristic or Descriptor Value Reliable Write
                GATTC Characteristic or Descriptor Value Write
                GATTC Descriptor Discovery
                GATTC Handle Value Indication
                GATTC Handle Value Notification
                GATTC Primary Service Discovery
                GATTC Read Characteristic Value by UUID
                GATTC Read Multiple Characteristic Values
                GATTC Relationship Discovery
                GATTC Timeout
              Structures
                ble_gattc_conn_cfg_t
                  write_cmd_tx_queue_size
                ble_gattc_handle_range_t
                  end_handle
                  start_handle
                ble_gattc_service_t
                  handle_range
                  uuid
                ble_gattc_include_t
                  handle
                  included_srvc
                ble_gattc_char_t
                  char_ext_props
                  char_props
                  handle_decl
                  handle_value
                  uuid
                ble_gattc_desc_t
                  handle
                  uuid
                ble_gattc_write_params_t
                  flags
                  handle
                  len
                  offset
                  p_value
                  write_op
                ble_gattc_attr_info16_t
                  handle
                  uuid
                ble_gattc_attr_info128_t
                  handle
                  uuid
                ble_gattc_evt_prim_srvc_disc_rsp_t
                  count
                  services
                ble_gattc_evt_rel_disc_rsp_t
                  count
                  includes
                ble_gattc_evt_char_disc_rsp_t
                  chars
                  count
                ble_gattc_evt_desc_disc_rsp_t
                  count
                  descs
                ble_gattc_evt_attr_info_disc_rsp_t
                  attr_info128
                  attr_info16
                  count
                  format
                  info
                ble_gattc_handle_value_t
                  handle
                  p_value
                ble_gattc_evt_char_val_by_uuid_read_rsp_t
                  count
                  handle_value
                  value_len
                ble_gattc_evt_read_rsp_t
                  data
                  handle
                  len
                  offset
                ble_gattc_evt_char_vals_read_rsp_t
                  len
                  values
                ble_gattc_evt_write_rsp_t
                  data
                  handle
                  len
                  offset
                  write_op
                ble_gattc_evt_hvx_t
                  data
                  handle
                  len
                  type
                ble_gattc_evt_exchange_mtu_rsp_t
                  server_rx_mtu
                ble_gattc_evt_timeout_t
                  src
                ble_gattc_evt_write_cmd_tx_complete_t
                  count
                ble_gattc_evt_t
                  attr_info_disc_rsp
                  char_disc_rsp
                  char_val_by_uuid_read_rsp
                  char_vals_read_rsp
                  conn_handle
                  desc_disc_rsp
                  error_handle
                  exchange_mtu_rsp
                  gatt_status
                  hvx
                  params
                  prim_srvc_disc_rsp
                  read_rsp
                  rel_disc_rsp
                  timeout
                  write_cmd_tx_complete
                  write_rsp
            Generic Attribute Profile (GATT) Common
              Defines
                Characteristic Presentation Formats
                  BLE_GATT_CPF_FORMAT_2BIT
                  BLE_GATT_CPF_FORMAT_BOOLEAN
                  BLE_GATT_CPF_FORMAT_DUINT16
                  BLE_GATT_CPF_FORMAT_FLOAT
                  BLE_GATT_CPF_FORMAT_FLOAT32
                  BLE_GATT_CPF_FORMAT_FLOAT64
                  BLE_GATT_CPF_FORMAT_NIBBLE
                  BLE_GATT_CPF_FORMAT_RFU
                  BLE_GATT_CPF_FORMAT_SFLOAT
                  BLE_GATT_CPF_FORMAT_SINT12
                  BLE_GATT_CPF_FORMAT_SINT128
                  BLE_GATT_CPF_FORMAT_SINT16
                  BLE_GATT_CPF_FORMAT_SINT24
                  BLE_GATT_CPF_FORMAT_SINT32
                  BLE_GATT_CPF_FORMAT_SINT48
                  BLE_GATT_CPF_FORMAT_SINT64
                  BLE_GATT_CPF_FORMAT_SINT8
                  BLE_GATT_CPF_FORMAT_STRUCT
                  BLE_GATT_CPF_FORMAT_UINT12
                  BLE_GATT_CPF_FORMAT_UINT128
                  BLE_GATT_CPF_FORMAT_UINT16
                  BLE_GATT_CPF_FORMAT_UINT24
                  BLE_GATT_CPF_FORMAT_UINT32
                  BLE_GATT_CPF_FORMAT_UINT48
                  BLE_GATT_CPF_FORMAT_UINT64
                  BLE_GATT_CPF_FORMAT_UINT8
                  BLE_GATT_CPF_FORMAT_UTF16S
                  BLE_GATT_CPF_FORMAT_UTF8S
                GATT Bluetooth Namespaces
                  BLE_GATT_CPF_NAMESPACE_BTSIG
                  BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN
                GATT Execute Write flags
                  BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL
                  BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE
                GATT Handle Value operations
                  BLE_GATT_HVX_INDICATION
                  BLE_GATT_HVX_INVALID
                  BLE_GATT_HVX_NOTIFICATION
                GATT Status Codes
                  BLE_GATT_STATUS_ATTERR_APP_BEGIN
                  BLE_GATT_STATUS_ATTERR_APP_END
                  BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND
                  BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG
                  BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR
                  BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE
                  BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG
                  BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION
                  BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION
                  BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE
                  BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION
                  BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES
                  BLE_GATT_STATUS_ATTERR_INVALID
                  BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH
                  BLE_GATT_STATUS_ATTERR_INVALID_HANDLE
                  BLE_GATT_STATUS_ATTERR_INVALID_OFFSET
                  BLE_GATT_STATUS_ATTERR_INVALID_PDU
                  BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL
                  BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED
                  BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN
                  BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END
                  BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR
                  BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE
                  BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED
                  BLE_GATT_STATUS_SUCCESS
                  BLE_GATT_STATUS_UNKNOWN
                GATT Timeout sources
                  BLE_GATT_TIMEOUT_SRC_PROTOCOL
                GATT Write operations
                  BLE_GATT_OP_EXEC_WRITE_REQ
                  BLE_GATT_OP_INVALID
                  BLE_GATT_OP_PREP_WRITE_REQ
                  BLE_GATT_OP_SIGN_WRITE_CMD
                  BLE_GATT_OP_WRITE_CMD
                  BLE_GATT_OP_WRITE_REQ
                BLE_GATT_ATT_MTU_DEFAULT
                BLE_GATT_HANDLE_END
                BLE_GATT_HANDLE_INVALID
                BLE_GATT_HANDLE_START
              Structures
                ble_gatt_conn_cfg_t
                  att_mtu
                ble_gatt_char_props_t
                  auth_signed_wr
                  broadcast
                  indicate
                  notify
                  read
                  write
                  write_wo_resp
                ble_gatt_char_ext_props_t
                  reliable_wr
                  wr_aux
            Generic Attribute Profile (GATT) Server
              Defines
                Attribute Table size
                  BLE_GATTS_ATTR_TAB_SIZE_DEFAULT
                  BLE_GATTS_ATTR_TAB_SIZE_MIN
                GATT Server Attribute Types
                  BLE_GATTS_ATTR_TYPE_CHAR_DECL
                  BLE_GATTS_ATTR_TYPE_CHAR_VAL
                  BLE_GATTS_ATTR_TYPE_DESC
                  BLE_GATTS_ATTR_TYPE_INC_DECL
                  BLE_GATTS_ATTR_TYPE_INVALID
                  BLE_GATTS_ATTR_TYPE_OTHER
                  BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL
                  BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL
                GATT Server Authorization Types
                  BLE_GATTS_AUTHORIZE_TYPE_INVALID
                  BLE_GATTS_AUTHORIZE_TYPE_READ
                  BLE_GATTS_AUTHORIZE_TYPE_WRITE
                GATT Server Operations
                  BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL
                  BLE_GATTS_OP_EXEC_WRITE_REQ_NOW
                  BLE_GATTS_OP_INVALID
                  BLE_GATTS_OP_PREP_WRITE_REQ
                  BLE_GATTS_OP_SIGN_WRITE_CMD
                  BLE_GATTS_OP_WRITE_CMD
                  BLE_GATTS_OP_WRITE_REQ
                GATT Server Service Types
                  BLE_GATTS_SRVC_TYPE_INVALID
                  BLE_GATTS_SRVC_TYPE_PRIMARY
                  BLE_GATTS_SRVC_TYPE_SECONDARY
                GATT Server defaults
                  BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT
                GATT Value Locations
                  BLE_GATTS_VLOC_INVALID
                  BLE_GATTS_VLOC_STACK
                  BLE_GATTS_VLOC_USER
                Maximum attribute lengths
                  BLE_GATTS_FIX_ATTR_LEN_MAX
                  BLE_GATTS_VAR_ATTR_LEN_MAX
                SVC return values specific to GATTS
                  BLE_ERROR_GATTS_INVALID_ATTR_TYPE
                  BLE_ERROR_GATTS_SYS_ATTR_MISSING
                Service Changed Inclusion Values
                  BLE_GATTS_SERVICE_CHANGED_DEFAULT
                System Attribute Flags
                  BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS
                  BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS
              Enumerations
                BLE_GATTS_CFGS
                  BLE_GATTS_CFG_SERVICE_CHANGED
                  BLE_GATTS_CFG_ATTR_TAB_SIZE
                BLE_GATTS_EVTS
                  BLE_GATTS_EVT_WRITE
                  BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
                  BLE_GATTS_EVT_SYS_ATTR_MISSING
                  BLE_GATTS_EVT_HVC
                  BLE_GATTS_EVT_SC_CONFIRM
                  BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST
                  BLE_GATTS_EVT_TIMEOUT
                  BLE_GATTS_EVT_HVN_TX_COMPLETE
                BLE_GATTS_SVCS
                  SD_BLE_GATTS_SERVICE_ADD
                  SD_BLE_GATTS_INCLUDE_ADD
                  SD_BLE_GATTS_CHARACTERISTIC_ADD
                  SD_BLE_GATTS_DESCRIPTOR_ADD
                  SD_BLE_GATTS_VALUE_SET
                  SD_BLE_GATTS_VALUE_GET
                  SD_BLE_GATTS_HVX
                  SD_BLE_GATTS_SERVICE_CHANGED
                  SD_BLE_GATTS_RW_AUTHORIZE_REPLY
                  SD_BLE_GATTS_SYS_ATTR_SET
                  SD_BLE_GATTS_SYS_ATTR_GET
                  SD_BLE_GATTS_INITIAL_USER_HANDLE_GET
                  SD_BLE_GATTS_ATTR_GET
                  SD_BLE_GATTS_EXCHANGE_MTU_REPLY
              Functions
                sd_ble_gatts_attr_get
                sd_ble_gatts_characteristic_add
                sd_ble_gatts_descriptor_add
                sd_ble_gatts_exchange_mtu_reply
                sd_ble_gatts_hvx
                sd_ble_gatts_include_add
                sd_ble_gatts_initial_user_handle_get
                sd_ble_gatts_rw_authorize_reply
                sd_ble_gatts_service_add
          &nb